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When a interrupt occurs, in what sequence CPU push the registers???

In the bochs I traced the stacks: before "int 3" excution and before "cli" in a isr stub function. I found it just pushed eflags(first), cs(second), eip(third) registers into the stack.

Is it right?

Maybe you can tell me in what sequence "pushad" push the general registers by the way.

That's right. When it does a ring change it also pushes SS (first) and ESP (second), followed by the rest as normal.

Pusha pushes eax, ecx, edx, ebx, esp, ebp, esi, edi in that order.

More info available here.

Cheers,

James

OK. 3Q.

JamesM, I am reading your tutorial and got the problem.

maybe you can add some information about the "struct resgisters" because I found the member sequence in this struct is according to the sequence of "ring change pushing" , "pushing int_no and errcode" and "pushad".

It was my confused problem yesterday. I drawed a long stack diagram to understand it.

http://www.sandpile.org/
Really nice reference for all stackframes, other "CPU-structs" and some more stuff...

oohayulin wrote:OK. 3Q.

JamesM, I am reading your tutorial and got the problem.

maybe you can add some information about the "struct resgisters" because I found the member sequence in this struct is according to the sequence of "ring change pushing" , "pushing int_no and errcode" and "pushad".

It was my confused problem yesterday. I drawed a long stack diagram to understand it.

Hi,

You're right, the registers structure is tailored to the stack frame created in my tutorials. It works for inter ring changes and non ring changes, because in the second case the last two members actually just point to junk, but the rest are good. Draw a diagram and work out why

JamesM wrote:Draw a diagram and work out why

Yeah. Drawing a diagram is great and helpful to understand. Now I have known much from drawing it.
Maybe others can try drawing too!