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Posted: **Tue Feb 12, 2008 4:37 am**

I have two questions regarding Paging and Physical Frame Allocation.

(1) I see some kernel implementations which set up paging with 4MB page size. However, for physical frame allocation, they use 4KB page size. I'm quite confused how can different page sizes be used.

(2) If I want to enable paging with 4KB page size, I can use the code below to setup page directory. But, How can I setup page table? and How to link page table to page directory:

Code: Select all

//setup page directory
uint32_t page_directory[1024] __attribute__ (aligned (4096));
uint32_t i;

for (i = 0; i < 1024; i++) {
    page_directory[i] = i * 4096 | 3; //supervisor level, read/write, present(011 in binary);
}

Thanks in advance!!!

Posted: **Tue Feb 12, 2008 4:59 am**

The paging mechanism consists of a hierarchy of tables. The processor takes top bits of the address and uses that as an index into the table. It then reads the corresponding entry, then considers based upon what's there. In most cases, it'll find it points to another table, it takes the next bits and use those at an index and looks up the entry in the new table. The process is repeated until the table reads that the address is a physical address rather than a table's address. When it sees that, it takes the physical address and adds the remaining bits to that before looking it up in main memory.

the hierarchy has a maximum depth - because there are a limited amount of bits that can used. In standard protected mode you have two levels, in other modes up to four.

4MB paging (or when you get further, 2MB pages and 1GB pages) works simply by stating that an entry is a physical address at a level higher than the lowest. the processor eats the top bytes, finds a physical address, and has a lot more bits left to add to that address (4M combinations), than when the processor has consumed two sets of bits (4k / 4096 combinations)

For the details, I suggest you grab a copy of the intel manuals.

Posted: **Tue Feb 12, 2008 5:02 am**

Hi,

To answer your questions:

1) In the 4KiB structure, you have a page table with 1024 entries, each of which points to a 4KiB page frame - you seem to understand this OK. In the 4MiB scheme, your page directory points to a 4MiB range instead of a page table, thus giving you a 4MiB continuous range (with PAE enabled, large pages are actually 2MiB).

2) Have a look at http://www.jamesmolloy.co.uk - there is a good paging tutorial there.

Cheers,
Adam

[edit]too late![/edit]

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Page directory and table setup

Page directory and table setup