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Hey guys,
when I played with IPIs I noticed something that I don't understand.
If I turn off interrupts (cli) and send an IPI it can't be accepted, right ?
But the strange thing is that the status is "Idle" after I sent the IPI.
When I turn on interrupts again it's accepted and the interrupt handler is called.
According to the Intel manual:
Delivery Status (Read Only)
Indicates the IPI delivery status, as follows:
0 (Idle) There is currently no IPI activity for this local
APIC, or the previous IPI sent from this local
APIC was delivered and >accepted< by the target
processor or processors.
How was the interrupt accepted although interrupts were turned off?
I don't know any specifics about IPIs but from what I have read it seems that the processor will buffer some interrupts while interrupt delivery is disabled.
core wrote:How was the interrupt accepted although interrupts were turned off?
Accepted just means that the receiving local APIC accepted the interrupt and set the corresponding bit in it's IRR (Interrupt Received Register).
When the local APIC sends the interrupt to the CPU (e.g. when interrupts are enabled and no higher priority IRQ is being serviced) the local APIC will clear the bit in the IRR and set the corresponding bit in the ISR (In Service Register). Then, when the CPU sends an EOI the local APIC will clear the highest priority ISR bit.
If you leave interrupts disabled, then the local APIC will still accept the interrupt and will still set the IRR bit. However, with interrupts disabled the local APIC won't send the interrupt to the CPU, or clear the IRR bit, or set the ISR bit (or allow an EOI to clear the ISR bit).
Cheers,
Brendan
For all things; perfection is, and will always remain, impossible to achieve in practice. However; by striving for perfection we create things that are as perfect as practically possible. Let the pursuit of perfection be our guide.
