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Right, I have tracked my problem down to what seems to be me not flushing the TLB cache inside the CPU causing it to access an invalid location and reboot.

When I tweaked some settings I got a page fault at 0x106000, this is after I have relocated. This is the physical address of the page directory, which I have mapped up at 0x8006000. This happens when I clear the PT mappings for the first 4mb of low memory.

This would explain why VMWare and bochs were not complaining, they don't have a TLB cache emulation.

So how do I use invlpg?? I know I could reload CR3 but this is wasteful.

Ohh, geez, it's been a while

If I recall correctly, invlpg accepts one parameter, which must not be a memory opperand.  This opperand is the physical address of the page you wish to invalidate.

Nasm example (from my OS @ www.neuraldk.org):

extern void invalidatePage(long physAddr);
invalidatePage:
        push    ebp
mov     ebp, esp
mov     eax, [ss:ebp+8]
invlpg  [eax]
pop ebp
ret

Hope that helps,
Jeff

Thanks for that, I will look into using it.

Another quick question, in a TSS, the selectors are just indexes into the GDT right? So why do I see people using odd numbers i.e. 0x23??

Maybe this is why I am getting a GPF when trying to task switch using ljmp *(..)

Daryl.

>So why do I see people using odd numbers i.e. 0x23??

The bottom two bits are the privilege value; the next lowest bit selects between the GDT and the LDT.

0x23 is a ring 3 selector in the GDT.