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Still getting a problem with the machine resetting when an interrupt occurs, it doesn't do this in VMWare so I am assuming the IDT's etc are setup properly, so it must be something with real hardware that the emulated hardware of VMWare doesn't cause.

Thing is if the only instruction in the interrupt handler is hlt it still reboots.

This is really annoying me now because I just can't figure out why the hell this is happening.

Is there anything wrong with this??

PICLower/PICUpper start as 0xFF

    outb( PICLower, 0x21 );
    outb( PICUpper, 0xA1 );

    // Setup 8259A-1
    outb( 0x11, 0x20 );       // Select 8259A-1
    outb( 0x20, 0x21 );       // 8259A-1 IRQ0-7 map to 0x20-0x27 (i.e after i386 interrupts)
    outb( 0x04, 0x21 );       // 8259A-1 (Master) cascades to slave or IRQ2
    outb( 0x01, 0x21 );       // Set manual EOI (0x02 for Auto EOI)
    outb( 0x02, 0x20 );       // Set back to normal cascaded mode
    outb( PICUpper, 0xA1 );

    // Setup 8259A-2
    outb( 0x11, 0xA0 );       // Select 8259A-2
    outb( 0x28, 0xA1 );       // 8259A-2 IRQ0-7 map to 0x28-0x2F
    outb( 0x02, 0xA1 );       // 8259A-2 (Slave)
    outb( 0x01, 0xA1 );       // Set manual EOI
    outb( 0x02, 0xA0 );       // Set back to normal cascaded mode
    outb( PICLower, 0x21 );

$20 says your eflags isn't 100%

Check to make sure that the reserved bits are set correctly.  Starting at 0, bit 1 should be hard coded to 1, bit 3 = 0, bit 5 = 0, bit 15 = 0.

The kicker is bit 1.  I had it set to 0 in my OS, and VMWare happily accepts it (as do some Intel processors), but AMDs'll puke.

Hope that's it!
Jeff

PS: This message is not legal tender   All bets are unofficial and cannot be pursuit, lol

This could well be right, I haven't done anything with EFlags yet.

And both test machines are AMD.

So what is the quickest way of resetting EFLAGS? (just being lazy :] )

You haven't done anything with EFlags?  If you really havent, then this probably isn't your problem.

My problem was in my multitasking code, setting eflags with a value with only interrupts enabled (ignoring that bit 1 must be 1).  But, if you haven't ever accessed eflags directly, then I can't see this being a problem for you.

Sorry man, thought I had it!
Jeff

Damn....I was about to jump for joy then.

Oh well, back to the drawing board!

Strange this is, it reboots even if there is no more than an iret call or an iret with EOI commands.

So it has to be with the 8259a code, doesn't it?

Oh, thanks for trying!

Okay, here are some more questions for you:

Is this interrupt coming while you're in ring 0 or some other ring?

What sort of gate are you using in the IDT?

Do you have a TSS set up, and the task register loaded? (not required if the interrupt is coming while you're in ring 0)

Are all the hardware interrupts other than the ones you have handlers for masked out?

Subject: RE:Interrupts
Author: jamethiel
Is this interrupt coming while you're in ring 0 or some other ring? Ring 0, no other ones set up yet

What sort of gate are you using in the IDT? Interrupt gate

Do you have a TSS set up, and the task register loaded? (not required if the interrupt is coming while you're in ring 0) No tss, not needed

Are all the hardware interrupts other than the ones you have handlers for masked out? Yes

Right, thanks for the help, I have got it working now.

Not entirely sure how, I rewrote big chunks of my MM code and I also rewrote the interrupt handling code. Looks like it has done the job!

So do you need help with the floppy driver again now? ^_-

Very observant!

Probably, I am currently finishing the microkernel off. I am quite impressed with my results so far.

Floppy driver will be a kernel module. Hopefully now my code is working better it might work first time (we can hope )