Initialising multi CPUs
Posted: Mon Nov 18, 2002 12:00 am
Does anyone have any experience with initialising 2nd (and up) CPUs under an SMP environment. Documentation is fairly scarce and very hard to follow. And of course code running (or otherwise) on the 2nd CPU is near immpossible to debug.
For the record, I am running an Asus P2B-DS motherboard with dual PIII 500MHz CPUs, my OS (using single CPU) runs fine, but I cannot persuade the second CPU to come online.
I have set up some intialisation code at 2000h (0200:0000 as CPU comes out of reset in real mode). Which (in theory) switches the AP to protected mode, sets a stack and far jumps to my flat 32-bit code segment running a tight infinite loop which just constantly increments a memory location (gives me something to confirm that it is running).
I set memory location 0000000F to 0Ah (should this really be in memory 0 not a port), and set 0004:0067h to point to my code 0200:0000 (again I have my suspicions aboutthis memory address).
I then clear the error status register in my local APIC and issue an INIT asserted to APIC ID 00 (I am APIC ID 01). I wait 20 mS then issue an INIT de-asserted to same, then wait a further 20mS and issue 2 SIPIs with another 20mS between them and a vector address of 02. As far as I can see, this should bring me to my code, but the memory location is not getting incremented and I haven't got a clue how to even begin to determine where the 2nd CPU is actually executng
Any tips would be extremely gratefully received
For the record, I am running an Asus P2B-DS motherboard with dual PIII 500MHz CPUs, my OS (using single CPU) runs fine, but I cannot persuade the second CPU to come online.
I have set up some intialisation code at 2000h (0200:0000 as CPU comes out of reset in real mode). Which (in theory) switches the AP to protected mode, sets a stack and far jumps to my flat 32-bit code segment running a tight infinite loop which just constantly increments a memory location (gives me something to confirm that it is running).
I set memory location 0000000F to 0Ah (should this really be in memory 0 not a port), and set 0004:0067h to point to my code 0200:0000 (again I have my suspicions aboutthis memory address).
I then clear the error status register in my local APIC and issue an INIT asserted to APIC ID 00 (I am APIC ID 01). I wait 20 mS then issue an INIT de-asserted to same, then wait a further 20mS and issue 2 SIPIs with another 20mS between them and a vector address of 02. As far as I can see, this should bring me to my code, but the memory location is not getting incremented and I haven't got a clue how to even begin to determine where the 2nd CPU is actually executng
Any tips would be extremely gratefully received