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I have 440 bytes for my boot sector that is responsible for switching to Protected Mode. Needless to say, I only have enough room to switch to protected mode, load the extended boot sector into the memory from the HDD and then jump to it. The problem is that I do not sense interrupts that are asserted by my HDD and then when the control is given to the extended boot sector, it will not be able to sense the interrupts either.


My boot sector:
• Sets the nIEN bit of the Device Control Register to prevent INTRQ to be
asserted.
• Clears the Interrupt Flag.

My extended boot sector:
• Clears the nIEN bit of the Device Control Register to accept INTRQ.
• Attempts to sense the interrupt.

Does anybody know what the problem could be? I am already disabling IDE interrupts but it seems some interrupts are pending when the control is given to my extended boot sector. Any help would be appreciated.

You could try turning off ide controller or sata drive thru command word of PCI configuration space before jump. The device would have to release its interrupt line, ports & mem mapped IO. How do you find your hard drive? Do you have bus,dev,func for it?
Section 6.2.2 of PCI Local Bus Specs rev3.0 has description of bits.

exkor,

ATA specifications state that setting the "nIEN" bit of the Device Control Register will not trigger interrupts

This signal is used by the selected device to interrupt the host system. When the nIEN bit is cleared to zero,
and the device is selected, INTRQ shall be enabled through a tri-state buffer and shall be driven either
asserted or negated. When the nIEN bit is set to one, or the device is not selected, the INTRQ signal shall
be in a high impedance state.

And I have already set it to 1 before sending the Read Sector(s) command to my IDE drive. I am also reading the status register to negate INTRQ in case it is fired. Have you had the same problem before or do you suggest reading the PCI specification? Thank you again.[/quote]

I myself do following to prevent any ints from both devices of one IDE channel before any PIO or BusMastering access.
mov dx,3f6h
mov al,2h
out dx,al
and then wait for BSY to be 0, select device, lba address ...

bit 2 of ide status reg is set to 1 after an int is generated, used if interrupts from ide are enabled

If you decide to go with pci, bios has 1ah interrupt & use revision 2.2 becaouse it has bit 10(Interrupt Disable) reserved so may need to write 0 to command word/reg to turn ide off.

I corrected the problem. In my first-stage boot loader, I loaded the extended (second stage) boot loader and the rest of the stuff in Real Mode and then in the Second Stage boot loader, I switched to Protected Mode, set up an IDT to b able to sense interrupts and then loaded the kernel.

exkor,

In your post you mentioned that I was better off reading the 3rd revision of PCI BUS specifications. Could you, please, share that specification by attaching it to this post? Thank you in advance.

XCHG wrote:In your post you mentioned that I was better off reading the 3rd revision of PCI BUS specifications. Could you, please, share that specification by attaching it to this post? Thank you in advance.

Its copyrighted and may not be distributed. You should get it yourself.

Cool. I got a copy of PCI Bus Specification Rev 2.0 and BIOS32 calls. This is really good. Thank you guys.