question on HigherHalf kernel...
Posted: Fri Sep 08, 2006 2:12 pm
i read : http://www.mega-tokyo.com/osfaq/HigherHalfKernel, then the linked thread.
So my question becomes:
If my kernel is loaded in its page tables at two points,
e.g. in lower half, 1-to-1 , so that after switching to paging, the next instruction in the IP reg is still valid, or am i wrong?
Also, now the kernel is in two places in the virtual memory. If i jump to some subroutine in my kernel, that subroutine is twice in the memory. To which one will the jump go?
The gdt only has base 0 entries.
Gr
So my question becomes:
If my kernel is loaded in its page tables at two points,
e.g. in lower half, 1-to-1 , so that after switching to paging, the next instruction in the IP reg is still valid, or am i wrong?
Also, now the kernel is in two places in the virtual memory. If i jump to some subroutine in my kernel, that subroutine is twice in the memory. To which one will the jump go?
The gdt only has base 0 entries.
Gr