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Well, all is well when i set the 800x600x16bit mode. Linear framebuffer offset is extracted and i got access to the whole 800x600 pixels.

Problems arrise when i switch to 800x600x32bit mode. I only got access to the first half of the 800x600 pixels(although the framebuffer offset is the same as in 16bit mode). Is the framebuffer segmented in some way,while in this mode?

Well, in either case, theres always bank switching *shurg*

Cheers, mr0b

Well, I don't think that the linear framebuffer is segmented But in 800x600x16 mode the framebuffer is half the size of the framebuffer in 800x600x32 mode... So I guess you perhaps calculated the offset into the framebuffer wrong...

If the botom half is black, this can mean you need to enable A20, or if already set up that the A20 code does not work on that PC.

bluecode wrote: Well, I don't think that the linear framebuffer is segmented But in 800x600x16 mode the framebuffer is half the size of the framebuffer in 800x600x32 mode... So I guess you perhaps calculated the offset into the framebuffer wrong...

The framebuffer offset isn't calculated at all, its extracted from the structure BIOS provides. In 1024x768x32bit while writing to the framebuffer(in my case, located at 0xf0000000) you can access the first and last thirds of the screen(whilst sequentially writing to the buffer).

Heh

Dex wrote: If the botom half is black, this can mean you need to enable A20, or if already set up that the A20 code does not work on that PC.

You were right Dex

A20 was the problem. Me and my OS owe you eternal gratitude

Cheers!

@Dex: i first thought "what a weird suggestion" and then remembered the A20 gate doesn't wrap all addresses into 1MB but rather merely hard-wire the 20th address bit to zero ... so indeed 0xF000000 is mapped to 0xF000000 and 0xF0200000 goes to 0xF020000 but 0xF0100000 is mapped to 0xF0000000 rather than 0xF0100000

...

Pype.Clicker wrote: @Dex: i first thought "what a weird suggestion" and then remembered the A20 gate doesn't wrap all addresses into 1MB but rather merely hard-wire the 20th address bit to zero

What a strange hack... They force you to jump through hoops to enable one address line when all of the higher ones work without hassle. I mean, historically, I understand why it ended up like this, but it's still strange.

No. All the higher onces don't work without the hassle.

While 0xF0100000 maps to 0xF0000000, 0xF0300000 would map to 0xF0200000. So you can't have any address where the bit 20 is 1.

im certain bkilgore meant the higher address lines, not the higher addresses

btw:
on power-up, all computers have a20 line enabled -- the boot code start address has a20=1:
FFFF_FFF0 -- the 21st address line is 1 -- just an interesting note, not really of any value, i guess

JAAman wrote:on power-up, all computers have a20 line enabled -- the boot code start address has a20=1:

I noticed that in the Intel docs - it says that the A20 line can be disabled for 8086 compatibility. Presumably the BIOS disables it?

it can be disabled? at the CPU level? thats new to me... i was under the impression that it is simply masked (not disabled) by an external chip (the keyboard controller)

Presumably the BIOS disables it?

must be since all CPUs since the 386 start executing at top of memory -- which means that the A20 address line must be enabled -- its not controlled by the CPU, so it wouldn't know the difference, but the ROM chips are mapped to the top of memory (just below the 4GB mark, unless thats changed to the 64GB mark? though nothing in the intel docs indicate that) so for the ROM chips to be addressed, the A20 line must be enabled

the BIOS must disable it -- prob at the same time it switches into RMode to transfer control to the OS

JAAman wrote: it can be disabled? at the CPU level? thats new to me... i was under the impression that it is simply masked (not disabled) by an external chip (the keyboard controller)

That's a terminological difference, whether it's disabled at the keyboard controller or on the cpu - you wouldn't notice the difference. I personally expect it to be at the keyboard controller (still), which doesn't mean much nowadays since it's integrated into the north bridge, which also does a load of other things.

afaik, it's called "A20M" and is CPU-controlled. I don't know how, though. But in practice it makes no difference.