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Hello, on my docs bit 4 off pagetable entry (10h) is reserved
and should be set to zero, on my computer (p3 933Mhz)
it seems that this bit when set to one the page is not cacheable and the computer runs much slower ,i want to know
if this happens on all cpus or if this is documented somewere, so i can use this feature,thanks.

that feature is indeed documented. IIrc, it depends on some bits in CR4. See figure 3.14: the bit you're talking about is "PCD" ...

erhm... i mean, of Intel Manuals (volume 3, Pentium 4 edition -- document 245472-012).

Pype.Clicker wrote: that feature is indeed documented. IIrc, it depends on some bits in CR4. See figure 3.14: the bit you're talking about is "PCD" ...

erhm... i mean, of Intel Manuals (volume 3, Pentium 4 edition -- document 245472-012).

thanks i already found it. i was using a 386 doc.