Hi,
Just curious, but which assembler?
For NASM, in 16 bit mode it will silently truncate 32 bit memory references unless there's a 32 bit register in the effective address. For example:
Code: Select all
mov eax,dword[es:0x00207000]
cmp eax,dword[es:0x00307000]
Will become:
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mov eax,dword[es:0x7000]
cmp eax,dword[es:0x7000]
To fix this, you need to put the "dword" keyword
inside the square brackets - for e.g.:
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mov eax,dword [dword es:0x00207000]
cmp eax,dword [dword es:0x00307000]
Alternatively, if there's a 32 bit register this isn't needed - for e.g. you could do:
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mov edi,0x00207000
mov eax,dword [es:edi]
In this case NASM knows it's a 32 bit address because you've used EDI instead of just DI. The same sort of thing applies to more complex effective addresses. For example, this works:
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mov edi,0
mov eax,dword [es:edi+0x00207000]
If the "dword" keyword is
outside of the brackets, then it's telling NASM to use 32 bit data values (not 32 bit addresses). For example, all of these instructions will generate the exact same code (in 16 bit mode):
Code: Select all
mov eax,dword [es:0x00207000]
mov eax,dword [es:0x7000]
mov eax,[es:0x00207000]
mov eax,[es:0x7000]
mov eax,dword [word es:0x00207000]
mov eax,dword [word es:0x7000]
mov eax,[word es:0x00207000]
mov eax,[word es:0x7000]
The "dword" keyword is only needed outside of the brackets when NASM can't figure out the size of the data. Normally it isn't needed because the source or destination is a register, and NASM can work out the size of the data from the size of the register used. For example, NASM will complain about these lines because it can't figure out what size the data is:
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mov [0x1234],0
movzx eax,[0x1234]
Instead you'd need to change these to something like:
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mov dword [0x1234],0
mov word [0x1234],0
mov byte [0x1234],0
movzx eax,byte [0x1234]
movzx eax,word [0x1234]
Anyway, compare your source code with the output from a disassembler to see if it looks the same....
Cheers,
Brendan