PCI configuration space header type 1?
PCI configuration space header type 1?
I've been trying to sort the PCI spec out for a few days now, and I think I understand most of it. However, the Linux and other documentation imply that you have to configure the bridges yourself (their mapping and so on), plus that you have to tell them which bridge they are. I expect this is in the configuration space for them, which would be a type 01 header according to the PCI spec v2.1. However, I can't seem to find it anywhere. It's supposed to be in the pci-to-pci bridge documentation, which I can't find online either (and I can't afford the official one). Since a lot of you have the pci stuff running, what am I missing?
- Pype.Clicker
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Re:PCI configuration space header type 1?
well, most of that will be sorted out by the BIOS if your BIOS is working properly. The only thing that Clicker does with bridges is keeping their presence counted to know how more busses should be scanned.
<grabbing "PCI local bus" book for more interresting info>
arg. that's for PCI *controllers* plenty of info about busmaster cycles and 'mailbox' registers, but nothing about bridges
</grabbing>
<doclocating for more PCI info>
application notes for 21150cn chip from Digital Semiconductor seems to carry valuable info.
intel datasheet for PCI-to-PCI bus too, check out section 13 "configuration space".
<grabbing "PCI local bus" book for more interresting info>
arg. that's for PCI *controllers* plenty of info about busmaster cycles and 'mailbox' registers, but nothing about bridges
</grabbing>
<doclocating for more PCI info>
The Header Type field (located at offset 0Eh) defines what layout is provided. Currently three Header Types are defined, 00h which has the layout shown in Figure 6-1, 01h which is defined for PCI-to-PCI bridges and is documented in the PCI to PCI Bridge Architecture Specification, and 02h which is defined for CardBus bridges and is documented in the PC Card Standard 40.
application notes for 21150cn chip from Digital Semiconductor seems to carry valuable info.
intel datasheet for PCI-to-PCI bus too, check out section 13 "configuration space".
Re:PCI configuration space header type 1?
Do the BIOSes take care not to overlap memory?
Do they adjust the E820 memory map if they do?
Can you remap the memory not counting NUMA?
Can you reconfigure the bus if you don't like the method they set it up?
What do BIOSes do with computers with 4GB+ memory?
Do they adjust the E820 memory map if they do?
Can you remap the memory not counting NUMA?
Can you reconfigure the bus if you don't like the method they set it up?
What do BIOSes do with computers with 4GB+ memory?
- Pype.Clicker
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Re:PCI configuration space header type 1?
okay. let's pretend i said nothing about BIOS and that you have very good reasons to want meddling with the affairs of PCI ...
the documents i posted should keep you busy for a while, as far as i've seen. At least they say where's the 'primary' and 'secondary' (as well as 'subordinates' bus numbers.
LKI also had very good description on the actual procedure used for re-configuring PCI busses, iirc.
the documents i posted should keep you busy for a while, as far as i've seen. At least they say where's the 'primary' and 'secondary' (as well as 'subordinates' bus numbers.
3:0 Reserved R The low 4 bits of this register are read only and return 0.
15:4 Memory base address <31:20>
R/W Defines the bottom address of an address range used by the 21152 to determine when to forward memory transactions from one interface to the other. The upper 12 bits are writable and correspond to address bits <31:20>. The lower 20 bits of the address are assumed to be 0. The memory address range adheres to 1 MB alignment and granularity. Reset value: 0.
LKI also had very good description on the actual procedure used for re-configuring PCI busses, iirc.
Re:PCI configuration space header type 1?
Hi,
I don't know for sure, but to be "safe" I always assume that the BIOS may only initialize the PCI devices that it needs, and that (for e.g.) if there's 3 video cards the BIOS might only initialize one of them.
I'd also expect different BIOSs to stuff things up differently (I wouldn't trust them to do everything well, even when it does work).
Then (for servers) there's "hot plug PCI". I'm not too familiar with the details, but its obvious the OS will need code to detect & initialize cards when they're plugged in if you ever hope to be able to support something like this.
Any memory range remapping would be very chipset/motherboard specific, so while I'd consider it possible I wouldn't attempt it.
For computers with > 3 GB of memory the BIOS can leave a hole for PCI devices. For example, for a computer with 4 GB the BIOS might create a hole from 3.5 GB to 4 GB and then put the RAM from 4 GB to 4.5 GB (or for some cheaper motherboards, ignore the RAM so it looks like you've only got 3.5 GB of RAM). Exact details probably vary between motherboards (it could be a BIOS option, could be autoconfigured by the BIOS, could be a default/fixed size hole, etc).
Cheers,
Brendan
I don't know for sure, but to be "safe" I always assume that the BIOS may only initialize the PCI devices that it needs, and that (for e.g.) if there's 3 video cards the BIOS might only initialize one of them.
I'd also expect different BIOSs to stuff things up differently (I wouldn't trust them to do everything well, even when it does work).
Then (for servers) there's "hot plug PCI". I'm not too familiar with the details, but its obvious the OS will need code to detect & initialize cards when they're plugged in if you ever hope to be able to support something like this.
BIOSs do take some care not to overlap memory (or make sure it won't cause problems if it does), and do adjust E820 accordingly.Candy wrote: Do the BIOSes take care not to overlap memory?
Do they adjust the E820 memory map if they do?
Can you remap the memory not counting NUMA?
Can you reconfigure the bus if you don't like the method they set it up?
What do BIOSes do with computers with 4GB+ memory?
Any memory range remapping would be very chipset/motherboard specific, so while I'd consider it possible I wouldn't attempt it.
For computers with > 3 GB of memory the BIOS can leave a hole for PCI devices. For example, for a computer with 4 GB the BIOS might create a hole from 3.5 GB to 4 GB and then put the RAM from 4 GB to 4.5 GB (or for some cheaper motherboards, ignore the RAM so it looks like you've only got 3.5 GB of RAM). Exact details probably vary between motherboards (it could be a BIOS option, could be autoconfigured by the BIOS, could be a default/fixed size hole, etc).
Cheers,
Brendan
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