OSDev.org

Hi,
I'm trying to implement a floppy driver. For the dma part I read the wiki. As it seems to work in qemu and bochs quite nice I would be satisfied with it for now if there wasn't one thing I can't understand:

In the FAQ is said the mode register of the dma chip is used to set the direction of IO.

[7]MOD1 [6]MOD0 [5]IDEC [4]AUTO [3]TRA1 [2]TRA0 [1]SEL1 [00]SEL0

SEL0 and SEL1 selects the channel you want to change.
TRA0 and TRA1 selects the transfer type.
00 runs a self test of the controller.
01 DMA Channel is for writing
10 DMA Channel is for reading
11 invalid

Therefore writing is 0x04 and reading 0x08. It's the same in the Intel specification. But if I use it in my implementation in this order it crashes. But the other way round [writing 10 / 0x08 and reading 01 / 0x04] works? ???
What am I getting wrong here?

Hi,

It can be a little confusing. The notes for transfer direction could be more specific:
[tt] 00 DMA Channel is for verifying to memory
01 DMA Channel is for writing to memory
10 DMA Channel is for reading from memory
11 invalid[/tt]

For example, if you're reading data from a floppy you'd need to tell the DMA controller to write the data to memory.


Cheers,

Brendan

thx, your description should replace the old one in the faq as it's clearer or at least a hint in the example for accessing the floppy that one has to consider that for reading from floppy the dma has to write to mem and the other way round.

Hi,

OZ wrote:thx, your description should replace the old one in the faq as it's clearer or at least a hint in the example for accessing the floppy that one has to consider that for reading from floppy the dma has to write to mem and the other way round.

Done - Brendan