I don't know why

[Beastie]

hi guys
i don't know what is the problem in my code my c gdt structure doesn't work.
i need some one to test my code and tell me where is the bug exactly.
download it @ http://linuxalex.sunsite.dk/libosdk.tar.bz2
thnx

[Pype.Clicker]

- phy2lin function seems completely weird to me ... are you trying to do segment = segment + offset ?
- your Gdtinfo structure is not packed (afaik). Check if sizeof(gdti)==6, but i guess it will rather be 8. You may want to declare it as

Code: Select all

struct gdtinfo {
   word padding;
   word limit;
   dword base;
};

and use &(gdtinfo.limit) instead.

[Beastie]

- phy2lin is a silly function i know it used when writing to a certain location on the screen by writing in the write offset of vga mem. but at least it worked before i played with gdt.
- i've tested gdti size and its 8 not 6.
any more comments ?

[Beastie]

after adding __attribute__((packed)) to each entry in the structs.
it now worked and printed both messages.
the gdtinfo is now 6 bytes not 8.
thnx alot
i will need u in the IDT ;D

[Beastie]

if i wanna to set a LDT or TSS do i have to add entry for them in the gdt or if i use a cs and ds with base 0 in the gdt, i can set them without an entry in the gdt

[Pype.Clicker]

LDT and TSS definitely need to be added as descriptors in the GDT if you plan to use them.

[Beastie]

i plan to use LDT only , but can multitasking achieved without TSS ?
BTW i've asked the question in the previous topic , some one told me that i can use cs desc. with base 0 for the IDT , so i thought i can use it although for LDT and TSS. here is the link http://board.flatassembler.net/topic.php?t=3631
thnx alot

[Beastie]

Another thing after setting IDT will all ints pointed to the ISR just for testing , then enable the ints, i got a message from the interrupt.
check my new version @ http://linuxalex.sunsite.dk/libosdk.tar.bz2
thnx again

[Beastie]

i debugged it and found that when i enable ints. the cpu generated int 8 Double Fault ???

[AR]

TSS is compulsory if you want multitasking, that is unless you're going to run all programs in kernel space... The LDT is not necessary however, it is simply another layer of segments on top of the GDT.

Double faults are usually caused by interrupts when the interrupt that occured doesn't have a handler, are you sure you set interrupt descriptor for about the first 20 and 0x70-0x78?

[Pype.Clicker]

i suggest you have a walk through the FAQ:
GDT for Dummies
Help!? i can't get interrupts working
Can i remap the PIC

[Beastie]

ok, i check it, but most of example just don't return from isr, they just panic,
some time i found in docs that we should add esp,4 before iret and some time add esp, 8. i cann't figure it out.
all i need to make an isr in assembly wich pass the int number and the required info. to terminate the process which cause the fault.
without pushing unnecessary data on the stack.
can u write me an example for that.
another thing , cann't i do multi tasking without TSS, just create a TSS structure for each process containing it segments and so on. and when i need to switch from 2 another process just dave the tss of the process in its area in the process table, and load the segments and other value in the tss of the next process then jump to its code segment.
i mean do what the cpu does manualy without loading TR with TSS.
thank alot

[Pype.Clicker]

ok, i check it, but most of example just don't return from isr, they just panic,
some time i found in docs that we should add esp,4 before iret and some time add esp, 8. i cann't figure it out.

This is meant for exceptions, usually. Some exceptions have an error code pushed on top of the stack and the handler is expected to remove it before it can IRET ...

Now, maybe what you mean is

Code: Select all

MyISR_stub0:
    pushad
    push dword 0
    call MyTimerISR
    add esp,4
    popad
    iretd

In this case, the "add esp,4" removes the argument "0" passed to MyTimerISR. That may sound funny, but C calling convention assume that the caller cleans the stack itself.

all i need to make an isr in assembly wich pass the int number and the required info. to terminate the process which cause the fault.
without pushing unnecessary data on the stack.
can u write me an example for that.

You have it just above If it still doesn't work, please elaborate on what "panics" (e.g. register dumps, error message and the like) and check you have properly set up the IDT (e.g. with something like the "test1" code)

another thing , cann't i do multi tasking without TSS, just create a TSS structure for each process containing it segments and so on. and when i need to switch from 2 another process just dave the tss of the process in its area in the process table, and load the segments and other value in the tss of the next process then jump to its code segment.
i mean do what the cpu does manualy without loading TR with TSS.

Yes, you can. However, most people prefer save/load state from the stack rather than from a structure and only have the stack pointer stored in the process/thread structure. They probably have plenty good reason to do that (locality, cache performance, things alike ), or maybe they just do it like linux does

[AR]

Yes, you can. However, most people prefer save/load state from the stack rather than from a structure and only have the stack pointer stored in the process/thread structure. They probably have plenty good reason to do that (locality, cache performance, things alike ), or maybe they just do it like linux does

My opinion on this is that having a stack for each thread is a rather inefficient proposition, you have 1KB stack of which only about 50-200bytes are used on average when the thread isn't running (since the additional space is needed for moving about inside the kernel during interrupts and system calls). Simply storing the state in the thread struct is more conservative of memory, fortunately for me I don't intend to support re-entrancy (being a microkernel, the only thing that will take time is IPC and not enough to merit allowing a process switch in the kernel) so all I need is one 1-4KB stack for each CPU then you don't even have to modify the TSS(s) at all.

The performance hit will hopefully not be too bad as I can arrange the struct to allow me to simply rep movsd the registers so that I can POPA. (Or do evil things with ESP like move it to the appropriate location in the thread struct and POPA then move it back)

[tom1000000]

My opinion on this is that having a stack for each thread is a rather inefficient proposition, you have 1KB stack of which only about 50-200bytes are used on average when the thread isn't running (since the additional space is needed for moving about inside the kernel during interrupts and system calls). Simply storing the state in the thread struct is more conservative of memory, fortunately for me I don't intend to support re-entrancy (being a microkernel, the only thing that will take time is IPC and not enough to merit allowing a process switch in the kernel) so all I need is one 1-4KB stack for each CPU then you don't even have to modify the TSS(s) at all.

The performance hit will hopefully not be too bad as I can arrange the struct to allow me to simply rep movsd the registers so that I can POPA. (Or do evil things with ESP like move it to the appropriate location in the thread struct and POPA then move it back)

AR you have an interesting idea, saving the thread's state into your kernel's memory (instead of on the thread's stack).

What do you do with the FPU/SSE registers? FXSAVE requires 512 bytes of memory, thats obviously fairly large.

Also have you considered porting issues. x86 has a small number of registers, but with other architectures it may be easier just to save the items in the thread's stack.

Overall though AR it does seem like a very good idea.