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gaiety wrote:
Here is my code:

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[BITS 16]
[ORG 0x7C00]

jmp short begin
nop                       ;***** This should be here*****
;****************************************************************
;* Floppy header record                  *
;****************************************************************
OEMStr          db 'SEAZONE.'               
BytesPerSector     dw 512                      
SectorsPerCluster    db 1                        
ReservedSector      dw 1                        
TotalFatCount       db 2                        
MaxRootEntries     dw 224                      
TotalSectorShort    dw 2880                     
MediaDescriptor     db 0xF0                     
SectorsPerFat      dw 9                        
SectorsPerTrack    dw 18                       
TotalHeader      dw 2                        
HiddenSectors    dd 0                        
TotalSectorsLong     dd 0                        
BootDriver      db 0                        
Reserved       db 0                       
Signature     db 29h                      
VolumeID        dd 0                        
VolumeLabel      db 'BIG BIG COW'       
FileSystemType       db 'FAT12   '               

The cli/sti pair are being used because they are modifying the Stack Segment (SS) and Stack Pointer (SP) registers. If an interrupt occurs mid-stack segment/pointer change, it's possible that the system will crash. Any Interrupt Service Routines (ISRs), will use your stack (either in full or just briefly) while servicing the IRQ. So it's really important that a valid stack is accessible while external interrupts are enabled.

The safe bet to just to disable external int's, until you have your stack setup.

this instruction: mov ss,ax
disables interrupts until the end of next instruction
to make possible to load ss and sp in two consecutive instructions without disabling interrupts.

so, this would work for a 386+ processor
mov ss, ax
mov sp, 0xfffff

Actually, CLI/STI on modifying stack is only necessary for 8086/8088 CPUs. All newer Intel CPUs AFAIK do that CLI/STI thing automatically.

Loading the SS register with a MOV instruction inhibits all interrupts until after the execution of the next instruction. This operation allows a stack pointer to be loaded into the ESP register with the next instruction (MOV ESP, stack-pointer value) before an interrupt occurs(1). The LSS instruction offers a more efficient method of loading the SS and ESP registers.

1. Note that in a sequence of instructions that individually delay interrupts past the following instruction, only the first instruction in the sequence is guaranteed to delay the interrupt, but subsequent interrupt-delaying instructions may not delay the interrupt. Thus, in the following instruction sequence: STI MOV SS, EAX MOV ESP, EBP interrupts may be recognized before MOV ESP, EBP executes, because STI also delays interrupts for one instruction.

Some computer boot at 0000:7c00 and some start at 07c0:0000. So, for my bootloader, if I have put the code

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[org 7c00h]

then everthing will be start at 7c00h. What I mean is my jump and everthing address will be start at base 7c00h. However, if the cpu boot at 07c0:0000, that mean all my jump and call will be incorect.

I am bit confuse about how jump occur, either jump just use the address of offset to jump to the target addess(Like the targer address is at 1000:7cFF, the jump just jump to 7cff offset and ignore the 1000 segment) or use of combination segment and offset to jump(If the address is 0100:7cff, the jump will use of 0100:7cff to jump). Same confuse with call function.

So, what to do? and which base will be nice to use for coding.

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[org 7c00]

or

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[org 0000]