OSDev.org

Oh okay. I get it. So what exactly happens if access to an address about the 20-bit limit while not having the A20 mask? I'd be afraid to hear a circuit glitch if that would happen, lol.

That's exactly what you want to happen - NOT have a mask The way I see it (and this is probably how all masks work) is that it is AND-ed to your address. So in this case you have a 21-bit address (say FFFF:FFFF) and your mask is ...111011111111111111111111b. You can't have addresses bigger than 21 bits anyway, and when you turn the mask off (by enabling the A20 gate), you set the 0 bit to 1 again.

Oh, who'd knew. Well, that explains the wrap-around.