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Re: GCC Inline asm label BUG??

Posted: Tue Jun 24, 2014 4:54 pm
by tsdnz
Well, after converting a couple of interrupt handlers to c++ and thinking this is great I have removed a couple of calls and possible cache misses, I started to look at all the other interrupt handlers and how to move them to c++.

What a nightmare!!!!
There are no macros in gcc as in assembly, so I would have to copy paste and change to suit.

This is not the way to do it!!!!!
I (NOW) agree with the advice I was given.

I put my thinking cap on and my solution was to write a generic interrupt handler in assembly and the kernel copies and modifies the instruction addresses as needed for each interrupt.
This means I have only one call, and the counters, performance monitors and load cycles are all grouped together to minimise cache misses.

This is what I was after and it is easy to assign an interrupt in c++ with out any worries.

Here is a small part of the interrupt assembly, which just calls the c++ code.

Code: Select all

	mov		rbx, 0x1122330155667788		; call Interrupt
	call		rbx				; call Interrupt
Basically I change the value in rbx using the Kernel at runtime, among other addresses, etc
This saves a list of interrupt pointers which have to be loaded, [rbx + rax * 8]

I have had my morning coffee.
I am sitting down.
My OS is performing very well.

I have taken my Meds, LOL.
I am ready for any and all "I told you so".
I know this is not as suggested by it really fits well with what I am trying to achieve.
I am ready for comments.
I have broad visual shoulders.

Enjoy you day.

Thanks, Alistair