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Re:PIC, IRQs and IDT?
Posted: Thu Sep 16, 2004 11:02 am
by bubach
That would be very nice!
I am getting nuts, while trying to figure out all bad C exampels were the source is spread in atleast 10 diffrent source files, are using structs and "hard-to-read"-ggc inline assembly.
/ Christoffer Bubach
Re:PIC, IRQs and IDT?
Posted: Thu Sep 16, 2004 2:51 pm
by ASHLEY4
Hi Christoffer, you can down load the idt demo from the my site
http://www.falconrybells.co.uk/
It's called "DemoVesa.zip" , let me know when you got it, or need more help.
ps: Are you still interested in developing a ASM OS with me ,if so let me know.
\\\\||////
(@@)
ASHLEY4.
Re:PIC, IRQs and IDT?
Posted: Fri Sep 17, 2004 12:58 am
by bubach
Thank you!
Of couse i was trying to send you a PM.. >:(
But now i guess that my message to you goes public:
I am still intrested in helping you out.
I have been unactive for the past 6 months, so i had totally forgot about you and your OS. ;D
Do you have PHP and mySQL support on your server? Otherwise i can use my own webspace. I was thinking of setting up a "admin" site for the two of us, were we could send messages and share source-code.
After i have made that page, i will be as active as i can. Becasue i am still going to continue on my own OS. And i have to study aswell.
Any functions that you would like the page to have? (besides PM and source uploading?)
Address would be like
http://bubach.1go.dk/DEX/
/ Christoffer
Re:PIC, IRQs and IDT?
Posted: Fri Sep 17, 2004 3:00 am
by ASHLEY4
Y not join here:
http://board.flatassembler.net/
Fasm is a great assembler, and there's lot's of help and there's a "OS Construction" forum, also has PM, and uploading and OS compo.
Also have a look here:
http://512.decard.net/?body=intro
ps: There are so many highs and lows, with OS dev you need a break () .
\\\\||////
(@@)
ASHLEY4.
Re:PIC, IRQs and IDT?
Posted: Fri Sep 17, 2004 12:09 pm
by bubach
Now i am getting this: :'(
Code: Select all
00000004256i[BIOS ] rombios.c,v 1.85.2.1 2003/01/16 21:58:42 cbothamy Exp $
00000318073i[KBD ] reset-disable command received
00000475236e[HD ] device set to 0 which does not exist
00000475529e[HD ] device set to 1 which does not exist
00000607088i[CPU ] BxError: instruction with op1=0xff
00000607088i[CPU ] nnn was 7
00000607088i[CPU ] WARNING: Encountered an unknown instruction (signalling illegal instruction):
00000607122e[CPU ] load_seg_reg: LDT invalid
00000607220p[CPU ] >>PANIC<< jump_protected: cs == 0
00000607220i[SYS ] Last time is 1095436212
00000607220i[CPU ] protected mode
00000607220i[CPU ] CS.d_b = 32 bit
00000607220i[CPU ] SS.d_b = 32 bit
00000607220i[CPU ] | EAX=408716ea EBX=00002443 ECX=00002820 EDX=0000051c
00000607220i[CPU ] | ESP=0000ffa7 EBP=01f90002 ESI=0010006c EDI=00000517
00000607220i[CPU ] | IOPL=0 NV UP DI NG NZ AC PO CY
00000607220i[CPU ] | SEG selector base limit G D
00000607220i[CPU ] | SEG sltr(index|ti|rpl) base limit G D
00000607220i[CPU ] | DS:0010( 0002| 0| 0) 00000000 000fffff 1 1
00000607220i[CPU ] | ES:0010( 0002| 0| 0) 00000000 000fffff 1 1
00000607220i[CPU ] | FS:0010( 0002| 0| 0) 00000000 000fffff 1 1
00000607220i[CPU ] | GS:0010( 0002| 0| 0) 00000000 000fffff 1 1
00000607220i[CPU ] | SS:0010( 0002| 0| 0) 00000000 000fffff 1 1
00000607220i[CPU ] | CS:0008( 0001| 0| 0) 00000000 000fffff 1 1
00000607220i[CPU ] | EIP=000006fd (000006f6)
00000607220i[CPU ] | CR0=0x60000011 CR1=0x00000000 CR2=0x00000000
00000607220i[CPU ] | CR3=0x00000000 CR4=0x00000000
00000607220i[ ] restoring default signal behavior
00000607220i[CTRL ] quit_sim called with exit code 1
========================================================================
Event type: PANIC
Device: [CPU ]
Message: jump_protected: cs == 0
A PANIC has occurred. Do you want to:
cont - continue execution
alwayscont - continue execution, and don't ask again.
This affects only PANIC events from device [CPU ]
die - stop execution now
abort - dump core
Choose one of the actions above: [die]
So i tried to set cs, but it doesn?t help.
it says "load_seg_reg: LDT invalid"!!
here?s my idt (almost the same as yours), but i don?t have 256 desc. only 50. it should work anyway right?
/ Christoffer (at the ege of madness)
Re:PIC, IRQs and IDT?
Posted: Fri Sep 17, 2004 12:32 pm
by Candy
What number of segment are you trying to load? Do you use a number ending between 0 and 3, or between 8 and B?
Re:PIC, IRQs and IDT?
Posted: Fri Sep 17, 2004 1:05 pm
by ASHLEY4
Did you make shore it had the right start and end lable ?
I also need to see your code.
\\\\||////
(@@)
ASHLEY4.
Re:PIC, IRQs and IDT?
Posted: Fri Sep 17, 2004 2:01 pm
by bubach
opps, i forgot to attach the code.
i am using 0x08...
the idt-file:
Code: Select all
; Interrupt Description Table.
;------------------------------
idt_start:
; 0. Interrupt 0x00.
;---------------------
dw isr00
dw 0x08
db 0
db 0x8E
dw 0
.......... ; a lot more that looks the same..
; 50. Interrupt 0x32.
;---------------------
dw isr32 ; <- my own test int
dw 0x08
db 0
db 0x8E
dw 0
idt_end:
; IDT pointer.
;-------------------------
idt_pointer:
dw idt_end - idt_start - 1
dd idt_start
and a typical isr:
Code: Select all
; Unhandled Interrupt
;---------------------
u_isr_str db "Unhandled Interrupt!", 0x00
u_isr:
pushad
push es
mov ax, 0x10
mov es, ax
mov dl, 0x0A ; row, 00h -> 18h (0 -> 24)
mov dh, 0x20 ; col, 00h -> 4Fh (0 -> 79)
call setcursorxy ; move it
mov esi, u_isr_str
mov al, 0x40 ; Red.
call print
cli
hlt
pop es
popad
iret
from kernel.asm
Code: Select all
; Setup IDT.
;--------------
lidt [idt_pointer] ; Load interrupt description table
and finally the whole source as a zip.
thanks for all the help!
/ Christoffer
Re:PIC, IRQs and IDT?
Posted: Fri Sep 17, 2004 2:22 pm
by Candy
00000607088i[CPU ] WARNING: Encountered an unknown instruction (signalling illegal instruction):
00000607122e[CPU ] load_seg_reg: LDT invalid
00000607220p[CPU ] >>PANIC<< jump_protected: cs == 0
My result from this is that at 607088 you got an invalid instruction. Find out what it is.
Assuming it's intentional (UD2 or something, testing the IDT) you got an invalid segment load at 607122. This loads a segment with an invalid value. I am assuming this is in the illegal opcode handler.
At 607220 (100 cycles later), you get a CS load. Seeing the time distance, is this a task switch or something? You might have made a stack mistake somewhere. That would also explain the LDT load and if you don't use paging the invalid opcode too.
Check where it goes wrong (skip say 606900 cycles (s 606900) and then trace-on) and dump that here (as attachment). That'd probably help so much in getting the problem identified.
Re:PIC, IRQs and IDT?
Posted: Fri Sep 17, 2004 2:32 pm
by bubach
the probelm is that i haven?t really got the hang of bochs debugger.. ::)
i did notice that thing about a invalid instruction, but i can?t figure out where.
does nasm allow me to do invalid instructions? >:(
should i "reload" the (a new and improved) gdt in my kernel?
all that stuff is made in my loader.asm (including stack stuff.)
/ Christoffer
Re:PIC, IRQs and IDT?
Posted: Sat Sep 18, 2004 1:05 am
by beyondsociety
Code: Select all
; 0. Interrupt 0x00.
;---------------------
dw isr00
dw 0x08
db 0
db 0x8E
dw 0
0x08 = the code selector used to jump into protected mode.
It should be 0x10 = data selector as your referring data from your idt.
Hope this helps.
Re:PIC, IRQs and IDT?
Posted: Sat Sep 18, 2004 8:14 am
by bubach
i think that i already have tested that, but thanks.
i can check it again.
/ Christoffer
Re:PIC, IRQs and IDT?
Posted: Sat Sep 18, 2004 5:23 pm
by beyondsociety
i think that i already have tested that, but thanks.
i can check it again.
You shouldnt have to re-check it as it should be the code selector (0x08). Staying up too late and working on other projects, causes you to give the wrong information. ;D
Re:PIC, IRQs and IDT?
Posted: Mon Sep 20, 2004 12:55 am
by bubach
I fixed it. Thanks to you all...
/ Christoffer
Re:PIC, IRQs and IDT?
Posted: Thu Sep 30, 2004 11:19 am
by ASHLEY4
bubach, what was the problem ?.
\\\\||////
(@@)
ASHLEY4.