Memory mapping

[Neo]

Thanks a lot Pype btw those were physical addresses.
I want to know one more thing though,I have passed the virtual address to be mapped as an immediate value(unsigned long) not pointer(unsigned long*) so which inline asm statement is correct

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__asm__ __volatile__ ("invlpg %0"::"m"(*(char*)(virt)); 

or

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__asm__ __volatile__ ("invlpg %0"::"m"(virt)); 

Thanks.

[Perica]

..

[Candy]

According to the Intel manuals, using a register as an operand is not valid. But they don't say anything about using something like invlpg [eax]. Do you think think something like this would work ?;

Yes, that's exactly what I said. Register as operand means using the register itself, memory reference is using the register as pointer. Encoding 0 is using eax as memory reference ([eax]) and encoding C0 is using eax as register (eax). So, use it as memory reference.

The Intel manuals also state: The INVLPG instruction is implementation dependent, and its function may be implemented differently on future IA-32 processors. If this is the case, I might aswell not use the instruction (as it might break compatibility with future processors ?). Everytime i change a page directory or page table entry, I'll just reaload the cr3 register, like this;

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mov eax, cr3
mov cr3, eax

You miss the point of the entire sentence. Its function may be implemented differently, so its function stays the same. Using it will stay the same, but it might send some sort of invalidate to all processors, be just uniprocessor, something like that, send other processors an exclusive request instead, things like that.

invlpg will still work, if only because it's useful.

[Neo]

I want to know one more thing though,I have passed the virtual address to be mapped as an immediate value(unsigned long) not pointer(unsigned long*) so which inline asm statement is correct

Code: Select all

__asm__ __volatile__ ("invlpg %0"::"m"(*(char*)(virt));  

or

Code: Select all

__asm__ __volatile__ ("invlpg %0"::"m"(virt)); 

Err... could you answer my question above

I also have another related question which i hadn't thought of before. When do i need a new PageTable.? For e.g I'm using Tim's idea of separting the Kernel space into 4 regions (3-3.25GB, 3.25-3.5GB, 3.5-3.75GB and 3.75-4GB) can i statically allocate PageTables for these entries in the PageDirectory? if not then when should i obtain pages for these? also can these PageTables be located anywhere or should they be fixed?

[guest]

how can i use a single C function for mapping in a new PageTableEntry and a new PageDirEntry. Right now i use 2 separate ones for this. Do i have to send an extra argument to distinguish this or is there a better way?

[Pype.Clicker]

how can i use a single C function for mapping in a new PageTableEntry and a new PageDirEntry. Right now i use 2 separate ones for this. Do i have to send an extra argument to distinguish this or is there a better way?

well, basically

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pgMap(vaddr_t va, phys_addr_t pa, pg_flags f) 
{
    unsigned dir_idx=PG_DIR_IDX(va); // extracts bits 22..31
    unsigned tbl_idx=PG_TBL_IDX(va); //extracts bits 12..21

    if (!directory[dir_idx].present) {
       create_and_initialize_table(dir_idx,f);
    } 
    
    // now ready to map the entry in the new/existing table
}

should do the trick ... i'm currently rewriting my page mapper to allow one-command mapping, so you can have a look and see if you find something helpful in it ...