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extern timer_counter;

#define byte unsigned char
#define dword unsigned int

#define bool byte
#define true 1
#define false 0

#define NULL 0x0

#define SUCCESS 1
#define FAIL 0

#define PIC1 0x20
#define PIC2 0xA0

#define ICW1 0x11
#define ICW4 0x01

#define ALL       0xFF
#define TIMER     0
#define KEYBOARD  1
#define CASCADE   2
#define COM2_4    3
#define COM1_3    4
#define LPT       5
#define FLOPPY    6
#define FREE7     7
#define CLOCK     8
#define FREE9     9
#define FREE10    10
#define FREE11    11
#define PS2MOUSE  12
#define COPROC    13
#define IDE_1     14
#define IDE_2     15

#define MASTER          0x20
#define MASTERDATA      0x21
#define SLAVE           0xA0
#define SLAVEDATA       0xA1
#define EOI             0x20

#define ICW1_INIT    0x10               // required for PIC initialisation
#define ICW1_EDGE    0x08               // edge triggered IRQs
#define ICW1_SINGLE  0x02               // only MASTER (not cascaded)
#define   ICW1_ICW4    0x01               // there IS an ICW4 control word

#define ICW4_SFNM    0x10               // Special Fully Nested Mode
#define ICW4_BUFFER  0x08               // Buffered Mode
#define ICW4_MASTER  0x04               // this is the Master PIC
#define ICW4_AEOI    0x02               // Auto EOI
#define ICW4_8086    0x01               // 80/86 Mode

void changeISR(unsigned int, void *);
void int_irq1(void);

/* init_pics()
 * init the PICs and remap them
 */
void init_pics(int pic1, int pic2)
{
   byte md,sd;

   md=inportb(MASTERDATA);                     // save state of MASTER DATA
   sd=inportb(SLAVEDATA);                      // save state of SLAVE DATA

   outportb(MASTER, EOI);                      // Send EOI | resets the chip

   outportb(MASTER, ICW1_INIT+ICW1_ICW4);      // ICW1 control word setup | just basic PIC stuff
   outportb(SLAVE, ICW1_INIT+ICW1_ICW4);       // see pic.h for more details about the values

   outportb(MASTERDATA, pic1);                 // ICW2 maps IRQs 0-7 to whatever kernel passes
   outportb(SLAVEDATA, pic2);                  // and same here except with IRQs 8-15 

   outportb(MASTERDATA, 0x04);                 // ICW3 
   outportb(SLAVEDATA, 0x02);

   outportb(MASTERDATA, ICW4_8086);            // ICW4 control word setup
   outportb(SLAVEDATA, ICW4_8086);

   outportb(MASTERDATA,md);                    // restore both MASTER DATA
   outportb(SLAVEDATA,sd);                     // restore SLAVE DATA
}

/* makes IRQ unavailable so it can't fire an interrupt */
void maskIRQ(byte irq)
{
   if(irq==ALL)
   {
      outportb(MASTERDATA,0xFF);
      outportb(SLAVEDATA,0xFF);
   }
   else
   {
      irq = irq | (1<<irq);
      if(irq < 8)
         outportb(MASTERDATA, irq&0xFF);
      else
         outportb(SLAVEDATA, irq>>8);
   }
}

/* opposite of above */
void unmaskIRQ(byte irq)
{
  byte picirq_m, picirq_s;
  if(irq > 7){
      picirq_m = 1 << 2;    //Cascade
      irq -= 8;
      picirq_s = 1 << irq;
  }else{
      picirq_m = 1 << irq;
  }

  picirq_m = ~picirq_m;
  picirq_s = ~picirq_s;

  outportb(MASTERDATA, picirq_m & inportb(MASTERDATA));
  outportb(SLAVEDATA, picirq_s & inportb(SLAVEDATA));
}

 /* enables/disables software interrupts */
void INTS(bool on)
{
   if(on)
   {
      asm("sti");
   }
   else
   {
      asm("cli");
   }
}

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[extern _testint]
[global _int32]

_int32:
        push    ds
        push    es                      ; saving segment registers and
        pushad                          ; other regs because it's an ISR
        mov     bx, 10h
        mov     ds, bx
        mov     es, bx                  ; load ds and es with valid selector
        call    _testint          ; call actual ISR code
        popad                           ; restoring the regs
        pop     es
        pop     ds
        iretd

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unsigned char *vidmem = 0xB8000;

void testint(void)
{
   (*vidmem)++;
   inportb(0x60);      //Acknoledge keyboard
   outportb(0x20, 0x20);
}

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void init_pics(int pic1, int pic2)
{
   outportb(MASTER, ICW1_INIT+ICW1_ICW4);      // ICW1 control word setup | just basic PIC stuff
   outportb(SLAVE, ICW1_INIT+ICW1_ICW4);      // see pic.h for more details about the values

   outportb(MASTERDATA, pic1);                // ICW2 maps IRQs 0-7 to whatever kernel passes
   outportb(SLAVEDATA, pic2);                  // and same here except with IRQs 8-15 

   outportb(MASTERDATA, 0x04);                // ICW3 
   outportb(SLAVEDATA, 0x02);

   outportb(MASTERDATA, ICW4_8086);            // ICW4 control word setup
   outportb(SLAVEDATA, ICW4_8086);

   outportb(MASTERDATA,0xFF);                    // mask everything
   outportb(SLAVEDATA,0xFF);              
}

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IDTR.limit  = 256*(sizeof(x86_interrupt)-1);

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IDTR.limit  = 256*(sizeof(x86_interrupt))-1;

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    IDT[number].low_offset  = (offset & 0xFFFF);
    IDT[number].selector    = selector;
    IDT[number].settings    = settings;
    IDT[number].high_offset  = (offset >> 16);

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   /* load IDTR with lidt */
    asm volatile("LIDT (%0) ": :"p" (IDTRptr));