Re: How do I find a partition while in WSL2?
Posted: Thu Apr 07, 2022 11:46 am
You can enable IDE tracing in qemu to gather more info.
Code: Select all
-trace enable=ide_*
The Place to Start for Operating System Developers
http://f.osdev.org/
Code: Select all
-trace enable=ide_*
Thanks, that helped a lot. It is definitely reading and writing data, but I'm not exactly sure what is wrong with it. I'm pretty sure this is what the code is supposed to be doing.linuxyne wrote:You can enable IDE tracing in qemu to gather more info.
Code: Select all
-trace enable=ide_*
Code: Select all
[email protected]:ide_ioport_write IDE PIO wr @ 0x1f0 (Data); val 0x00; bus 0x55d61092fc40 IDEState 0x55d61092fcc0
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0x58; bus 0x55d61092fc40 IDEState 0x55d61092fcc0
[email protected]:ide_ioport_write IDE PIO wr @ 0x1f0 (Data); val 0x00; bus 0x55d61092fc40 IDEState 0x55d61092fcc0
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0x58; bus 0x55d61092fc40 IDEState 0x55d61092fcc0
[email protected]:ide_ioport_write IDE PIO wr @ 0x1f0 (Data); val 0x00; bus 0x55d61092fc40 IDEState 0x55d61092fcc0
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0x58; bus 0x55d61092fc40 IDEState 0x55d61092fcc0
[email protected]:ide_ioport_write IDE PIO wr @ 0x1f0 (Data); val 0x00; bus 0x55d61092fc40 IDEState 0x55d61092fcc0
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0x58; bus 0x55d61092fc40 IDEState 0x55d61092fcc0
[email protected]:ide_ioport_write IDE PIO wr @ 0x1f0 (Data); val 0x00; bus 0x55d61092fc40 IDEState 0x55d61092fcc0
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0x58; bus 0x55d61092fc40 IDEState 0x55d61092fcc0
[email protected]:ide_ioport_write IDE PIO wr @ 0x1f0 (Data); val 0x00; bus 0x55d61092fc40 IDEState 0x55d61092fcc0
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0x58; bus 0x55d61092fc40 IDEState 0x55d61092fcc0
[email protected]:ide_ioport_write IDE PIO wr @ 0x1f7 (Command); val 0xe7; bus 0x55d61092fc40 IDEState 0x55d61092fcc0
[email protected]:ide_exec_cmd IDE exec cmd: bus 0x55d61092fc40; state 0x55d61092fcc0; cmd 0xe7
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0x58; bus 0x55d61092fc40 IDEState 0x55d61092fcc
Use a hex editor to examine the disk image. What if there's a bug in your code to read the disk?Caffeine wrote:I'm writing to LBA 0x0 and I'm checking that the disk gets saved by restarting the OS and reading LBA 0x0 again. Is there a better way to check if the disk saved or not?
According to that log, DRQ has not cleared, which means the drive is still waiting for you to complete the transfer, which means you're aborting the command by starting a new command.Caffeine wrote:Does anything look wrong here?
I've changed the qemu command to:iansjack wrote:The error message is actually saying that you can’t write to block 0, so it’s no wonder you don’t see a change. Either try specifically saying it’s a raw image or try writing to a different block.
Code: Select all
qemu-system-i386 -drive file=disk.img,media=disk,format=raw -cdrom Binaries/caffieneOS.iso -m 16M -boot order=dc
Code: Select all
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0x50; bus 0x562a82a55dd0 IDEState 0x562a82a55e50
Yeah, sorry. I don't know how I didn't catch that. Here is part of the log when it writes:Octocontrabass wrote:According to that log, you're reading the status register and nothing else. Is there more to the log that you haven't posted?
Code: Select all
[email protected]:ide_ioport_write IDE PIO wr @ 0x1f6 (Device/Head); val 0x40; bus 0x5592c4de8190 IDEState 0x5592c4de8210
[email protected]:ide_ioport_write IDE PIO wr @ 0x1f2 (Sector Count); val 0x00; bus 0x5592c4de8190 IDEState 0x5592c4de8210
[email protected]:ide_ioport_write IDE PIO wr @ 0x1f3 (Sector Number); val 0x00; bus 0x5592c4de8190 IDEState 0x5592c4de8210
[email protected]:ide_ioport_write IDE PIO wr @ 0x1f4 (Cylinder Low); val 0x00; bus 0x5592c4de8190 IDEState 0x5592c4de8210
[email protected]:ide_ioport_write IDE PIO wr @ 0x1f5 (Cylinder High); val 0x00; bus 0x5592c4de8190 IDEState 0x5592c4de8210
[email protected]:ide_ioport_write IDE PIO wr @ 0x1f2 (Sector Count); val 0x02; bus 0x5592c4de8190 IDEState 0x5592c4de8210
[email protected]:ide_ioport_write IDE PIO wr @ 0x1f3 (Sector Number); val 0xff; bus 0x5592c4de8190 IDEState 0x5592c4de8210
[email protected]:ide_ioport_write IDE PIO wr @ 0x1f4 (Cylinder Low); val 0x00; bus 0x5592c4de8190 IDEState 0x5592c4de8210
[email protected]:ide_ioport_write IDE PIO wr @ 0x1f5 (Cylinder High); val 0x00; bus 0x5592c4de8190 IDEState 0x5592c4de8210
[email protected]:ide_ioport_write IDE PIO wr @ 0x1f7 (Command); val 0x34; bus 0x5592c4de8190 IDEState 0x5592c4de8210
[email protected]:ide_exec_cmd IDE exec cmd: bus 0x5592c4de8190; state 0x5592c4de8210; cmd 0x34
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0x58; bus 0x5592c4de8190 IDEState 0x5592c4de8210
[email protected]:ide_data_writel IDE PIO wr @ 0x1f0 (Data: Long); val 0x0000000f; bus 0x5592c4de8190; IDEState 0x5592c4de8210
[email protected]:ide_data_writel IDE PIO wr @ 0x1f0 (Data: Long); val 0x0000000f; bus 0x5592c4de8190; IDEState 0x5592c4de8210
[email protected]:ide_data_writel IDE PIO wr @ 0x1f0 (Data: Long); val 0x0000000f; bus 0x5592c4de8190; IDEState 0x5592c4de8210
[email protected]:ide_data_writel IDE PIO wr @ 0x1f0 (Data: Long); val 0x0000000f; bus 0x5592c4de8190; IDEState 0x5592c4de8210
[email protected]:ide_data_writel IDE PIO wr @ 0x1f0 (Data: Long); val 0x0000000f; bus 0x5592c4de8190; IDEState 0x5592c4de8210
[email protected]:ide_data_writel IDE PIO wr @ 0x1f0 (Data: Long); val 0x0000000f; bus 0x5592c4de8190; IDEState 0x5592c4de8210
[email protected]:ide_data_writel IDE PIO wr @ 0x1f0 (Data: Long); val 0x0000000f; bus 0x5592c4de8190; IDEState 0x5592c4de8210
[email protected]:ide_data_writel IDE PIO wr @ 0x1f0 (Data: Long); val 0x0000000f; bus 0x5592c4de8190; IDEState 0x5592c4de8210
[email protected]:ide_data_writel IDE PIO wr @ 0x1f0 (Data: Long); val 0x0000000f; bus 0x5592c4de8190; IDEState 0x5592c4de8210
[email protected]:ide_data_writel IDE PIO wr @ 0x1f0 (Data: Long); val 0x0000000f; bus 0x5592c4de8190; IDEState 0x5592c4de8210
[email protected]:ide_data_writel IDE PIO wr @ 0x1f0 (Data: Long); val 0x0000000f; bus 0x5592c4de8190; IDEState 0x5592c4de8210
[email protected]:ide_data_writel IDE PIO wr @ 0x1f0 (Data: Long); val 0x0000000f; bus 0x5592c4de8190; IDEState 0x5592c4de8210
[email protected]:ide_data_writel IDE PIO wr @ 0x1f0 (Data: Long); val 0x0000000f; bus 0x5592c4de8190; IDEState 0x5592c4de8210
[email protected]:ide_data_writel IDE PIO wr @ 0x1f0 (Data: Long); val 0x0000000f; bus 0x5592c4de8190; IDEState 0x5592c4de8210
[email protected]:ide_data_writel IDE PIO wr @ 0x1f0 (Data: Long); val 0x0000000f; bus 0x5592c4de8190; IDEState 0x5592c4de8210
[email protected]:ide_data_writel IDE PIO wr @ 0x1f0 (Data: Long); val 0x0000000f; bus 0x5592c4de8190; IDEState 0x5592c4de8210
[email protected]:ide_data_writel IDE PIO wr @ 0x1f0 (Data: Long); val 0x0000000f; bus 0x5592c4de8190; IDEState 0x5592c4de8210
[email protected]:ide_data_writel IDE PIO wr @ 0x1f0 (Data: Long); val 0x0000000f; bus 0x5592c4de8190; IDEState 0x5592c4de8210
[email protected]:ide_data_writel IDE PIO wr @ 0x1f0 (Data: Long); val 0x0000000f; bus 0x5592c4de8190; IDEState 0x5592c4de8210
Code: Select all
[email protected]:ide_data_writel IDE PIO wr @ 0x1f0 (Data: Long); val 0x00000000; bus 0x5592c4de8190; IDEState 0x5592c4de8210
[email protected]:ide_data_writel IDE PIO wr @ 0x1f0 (Data: Long); val 0x00000000; bus 0x5592c4de8190; IDEState 0x5592c4de8210
[email protected]:ide_data_writel IDE PIO wr @ 0x1f0 (Data: Long); val 0x00000000; bus 0x5592c4de8190; IDEState 0x5592c4de8210
[email protected]:ide_data_writel IDE PIO wr @ 0x1f0 (Data: Long); val 0x00000000; bus 0x5592c4de8190; IDEState 0x5592c4de8210
[email protected]:ide_data_writel IDE PIO wr @ 0x1f0 (Data: Long); val 0x00000000; bus 0x5592c4de8190; IDEState 0x5592c4de8210
[email protected]:ide_data_writel IDE PIO wr @ 0x1f0 (Data: Long); val 0x00000000; bus 0x5592c4de8190; IDEState 0x5592c4de8210
[email protected]:ide_data_writel IDE PIO wr @ 0x1f0 (Data: Long); val 0x00000000; bus 0x5592c4de8190; IDEState 0x5592c4de8210
[email protected]:ide_data_writel IDE PIO wr @ 0x1f0 (Data: Long); val 0x00000000; bus 0x5592c4de8190; IDEState 0x5592c4de8210
[email protected]:ide_data_writel IDE PIO wr @ 0x1f0 (Data: Long); val 0x00000000; bus 0x5592c4de8190; IDEState 0x5592c4de8210
[email protected]:ide_data_writel IDE PIO wr @ 0x1f0 (Data: Long); val 0x00000000; bus 0x5592c4de8190; IDEState 0x5592c4de8210
[email protected]:ide_data_writel IDE PIO wr @ 0x1f0 (Data: Long); val 0x00000000; bus 0x5592c4de8190; IDEState 0x5592c4de8210
[email protected]:ide_ioport_write IDE PIO wr @ 0x1f7 (Command); val 0xe7; bus 0x5592c4de8190 IDEState 0x5592c4de8210
So I changed the ataPioWrite() function:Octocontrabass wrote:According to that log, you're not checking the status register before you send the next command. The drive will abort the write if it's not ready before you send the next command.
You're also using 32-bit writes on the 16-bit data register, which is not supported by all IDE controllers. (I'm not even sure if QEMU supports it.)
Code: Select all
void ataPioWrite(unsigned int LBA, unsigned short sectorcount, unsigned char *target) {
outportb(ATA_PRIMARY_DRIVE_HEAD, 0x40); // Select master
outportb(ATA_PRIMARY_SECCOUNT, (sectorcount >> 8) & 0xFF); // Sector Count hi
outportb(ATA_PRIMARY_LBA_LO, (LBA >> 24) & 0xFF); // LBA4
outportb(ATA_PRIMARY_LBA_MID, (LBA >> 32) & 0xFF); //LBA5
outportb(ATA_PRIMARY_LBA_HI, (LBA >> 40) & 0xFF); // LBA6
outportb(ATA_PRIMARY_SECCOUNT, sectorcount & 0xFF); // Sector Count low
outportb(ATA_PRIMARY_LBA_LO, LBA & 0xFF); // LBA1
outportb(ATA_PRIMARY_LBA_MID, (LBA >> 8) & 0xFF); //LBA2
outportb(ATA_PRIMARY_LBA_HI, (LBA >> 16) & 0xFF); // LBA3
outportb(ATA_PRIMARY_COMM_REGSTAT, 0x34); // WRITE SECTORS EXT command
for (unsigned char i = 0; i < sectorcount; i++) {
pollATA(); // Wait for it to be able to transfer data
// Transfer the data
for (int j = 0; j < 256; j++) { pollATA(); outportb(ATA_PRIMARY_DATA, target[i]); }
target += 256;
}
// Flush the cache.
outportb(ATA_PRIMARY_COMM_REGSTAT, 0xE7);
// Poll for BSY.
while (inportb(ATA_PRIMARY_COMM_REGSTAT) & STAT_BSY) {}
}
Code: Select all
void outportb (unsigned short _port, unsigned char _data) {
__asm__ __volatile__ ("outb %1, %0" : : "dN" (_port), "a" (_data));
}
Do you see compiler warnings for these two lines? If not, turn on more compiler warnings and then fix the problems.Caffeine wrote:Code: Select all
outportb(ATA_PRIMARY_LBA_MID, (LBA >> 32) & 0xFF); //LBA5 outportb(ATA_PRIMARY_LBA_HI, (LBA >> 40) & 0xFF); // LBA6
The data port only accepts 16-bit writes. You are using 8-bit writes.Caffeine wrote:Code: Select all
for (int j = 0; j < 256; j++) { pollATA(); outportb(ATA_PRIMARY_DATA, target[i]); }
You need to wait for the drive to be ready before sending another command.Caffeine wrote:Code: Select all
outportb(ATA_PRIMARY_COMM_REGSTAT, 0xE7);
I fixed the compiler warning. For the writes, I am a little lost on how to write 16 bits to the register. And I have put a pollATA() before the last line.Octocontrabass wrote:Do you see compiler warnings for these two lines? If not, turn on more compiler warnings and then fix the problems.Caffeine wrote:Code: Select all
outportb(ATA_PRIMARY_LBA_MID, (LBA >> 32) & 0xFF); //LBA5 outportb(ATA_PRIMARY_LBA_HI, (LBA >> 40) & 0xFF); // LBA6
The data port only accepts 16-bit writes. You are using 8-bit writes.Caffeine wrote:Code: Select all
for (int j = 0; j < 256; j++) { pollATA(); outportb(ATA_PRIMARY_DATA, target[i]); }
You need to wait for the drive to be ready before sending another command.Caffeine wrote:Code: Select all
outportb(ATA_PRIMARY_COMM_REGSTAT, 0xE7);
You already have a function to write an 8-bit value to a port, right? Create a copy of that function, but adapted for 16 bits. Like this:Caffeine wrote:For the writes, I am a little lost on how to write 16 bits to the register.
Code: Select all
void outportw (unsigned short _port, unsigned short _data) {
__asm__ __volatile__ ("outw %1, %0" : : "dN" (_port), "a" (_data));
}
So I have fixed that, but it still is not saving. I'm starting to think it might have something to do with qemu not saving. I've removed all of the warnings its giving me and such, but it still isn't saving when I restart the OS. When I write to an LBA and read it back before restarting it, it works, but when closing qemu and rerunning the code, it does not work. I did not use snapshot mode or anything when I created the disk, so I have no clue what is wrong.Octocontrabass wrote:You already have a function to write an 8-bit value to a port, right? Create a copy of that function, but adapted for 16 bits. Like this:Caffeine wrote:For the writes, I am a little lost on how to write 16 bits to the register.
Code: Select all
void outportw (unsigned short _port, unsigned short _data) { __asm__ __volatile__ ("outw %1, %0" : : "dN" (_port), "a" (_data)); }
Code: Select all
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000; bus 0x561b275cf190; IDEState 0x561b275cf210
Code: Select all
[email protected]:ide_sector_write sector=3 nsectors=1
[email protected]:ide_ioport_write IDE PIO wr @ 0x1f7 (Command); val 0xe7; bus 0x561b275cf190 IDEState 0x561b275cf210
[email protected]:ide_exec_cmd IDE exec cmd: bus 0x561b275cf190; state 0x561b275cf210; cmd 0xe7
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x561b275cf190 IDEState 0x561b275cf210
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x561b275cf190 IDEState 0x561b275cf210
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x561b275cf190 IDEState 0x561b275cf210
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x561b275cf190 IDEState 0x561b275cf210
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x561b275cf190 IDEState 0x561b275cf210
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x561b275cf190 IDEState 0x561b275cf210
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x561b275cf190 IDEState 0x561b275cf210
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x561b275cf190 IDEState 0x561b275cf210
Code: Select all
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x561b275cf190 IDEState 0x561b275cf210
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x561b275cf190 IDEState 0x561b275cf210
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x561b275cf190 IDEState 0x561b275cf210
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x561b275cf190 IDEState 0x561b275cf210
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x561b275cf190 IDEState 0x561b275cf210
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x561b275cf190 IDEState 0x561b275cf210
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0xc0; bus 0x561b275cf190 IDEState 0x561b275cf210
[email protected]:ide_ioport_read IDE PIO rd @ 0x1f7 (Status); val 0x50; bus 0x561b275cf190 IDEState 0x561b275cf210
Doesn't your pollATA() function wait for the drive to be ready to transfer data? The drive will never be ready to transfer data if the write is complete. You need to wait until the drive is ready to accept a new command instead.Caffeine wrote:Also, adding pollATA() before outportb(ATA_PRIMARY_COMM_REGSTAT, 0xE7); causes the OS to stall.
You didn't provide a complete log. Does every line like this say "val 0x0000"?Caffeine wrote:Code: Select all
[email protected]:ide_data_writew IDE PIO wr @ 0x1f0 (Data: Word); val 0x0000;