Re: XHCI working on emulator but not on real hardware
Posted: Thu Jul 02, 2020 2:49 pm
Hello
On line 943: are you sure that the value should be 10? Have you checked the max slots?
On line 970: You have cleared bit no. 3, there, incorrectly. Write a 1 to it, instead of writing a 0 to it. When you write a 1 to it, it clears.
Maybe You need to write to the event ring dequeue pointer register more often. That is writing the event ring address plus offset, there, after it has increased by 16 (as in line 741, for example). Read the specification about what value to put there. In my own code I wrote the event ring address plus offset in the ring, after it increased by 16. That is, a spot in the ring that is yet to be handled. Not really sure about this.
I also think You should clear bit no 3 (event handler busy), there (by setting it as in line 970) every time you write to the event ring dequeue pointer register (or before writing to the event ring dequeue pointer register , or after writing to the event ring dequeue pointer register). Not sure about this either.
You can also try to set the interrupt on completion bits in your trbs. I actually think that You should do that.
Sorry if I provided some incorrect info. Really not sure since I haven't tested on real hardware. Maybe Ben or Somebody Else can confirm this, or say this is wrong, and/or help further. hehe.
best regards
On line 943: are you sure that the value should be 10? Have you checked the max slots?
On line 970: You have cleared bit no. 3, there, incorrectly. Write a 1 to it, instead of writing a 0 to it. When you write a 1 to it, it clears.
Maybe You need to write to the event ring dequeue pointer register more often. That is writing the event ring address plus offset, there, after it has increased by 16 (as in line 741, for example). Read the specification about what value to put there. In my own code I wrote the event ring address plus offset in the ring, after it increased by 16. That is, a spot in the ring that is yet to be handled. Not really sure about this.
I also think You should clear bit no 3 (event handler busy), there (by setting it as in line 970) every time you write to the event ring dequeue pointer register (or before writing to the event ring dequeue pointer register , or after writing to the event ring dequeue pointer register). Not sure about this either.
You can also try to set the interrupt on completion bits in your trbs. I actually think that You should do that.
Sorry if I provided some incorrect info. Really not sure since I haven't tested on real hardware. Maybe Ben or Somebody Else can confirm this, or say this is wrong, and/or help further. hehe.
best regards