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Awe2K wrote:What does umap function mean?

I've already started rewriting my kernel as higher half from a total zero.
I will follow the steps you mentioned. Also, does higher half kernel mean paging is enabled by default?

Edit: if it is, how do I edit page entries in my kernel, after boot.s?

umap = un-map page (similar to how *nix uses umount to un-mount)

You edit it the same way you normally would, If you create the page directory you **SHOULD** know exactly where in memory it is. (e.g. My PDIR is mapped at 0xFFBFF000 and all its PTBLs are mapped at 0xFFC0000 - 0xFFFFFFFF)
If you do not reload CR3 after modifying use INVLPG to invalidate the page.

And yes higher half, pageing is enabled before jumping to the kernel's main function.

Also, how do 4MB pages differ from 4KB in tables? How many entries are in directory and table?

I'm not sure but these links should explain it:
http://wiki.osdev.org/Physical_Address_Extension
http://wiki.osdev.org/Setting_Up_Paging_With_PAE
But don't forget to check support for PAE with CPUID

How does page table entry look? Are flags the same? I'm a bit noob in PSE&PAE

Also, could you give me an example of paging with PSE/PAE?
I don't know what to put in page directories after I've already mapped it by bootstrap and jumped to kernel.

Explanations for PAE:
https://github.com/kiznit/kiznix/blob/v ... vmm.c#L131

vmm_init() code for PAE:
https://github.com/kiznit/kiznix/blob/v ... vmm.c#L160

kiznit wrote:Explanations for PAE:
https://github.com/kiznit/kiznix/blob/v ... vmm.c#L131

vmm_init() code for PAE:
https://github.com/kiznit/kiznix/blob/v ... vmm.c#L160

Thanks, it seems I've implemented simple paging in my kernel. (It actually doesn't use PAE, only PSE to have 4MB pages).
I use PSE, because I don't want to mess with multi-level structures, like in PAE (pdpt->pagedir->pagetable), only page_dir

Edit: already added something like malloc and free (just simple heap allocator, gives memory from special pages (0xC00000-0xF00000, it's my memory used to allocate heap)).