Page 2 of 2
Re: Segmentation memory- question
Posted: Sun Sep 07, 2014 2:44 pm
by szarek
Brendan, thanks for your help
The CPU has 2 different "spaces"
1. Therefore, is it phisically placed in cpu's memory?
2. Is it cache memory?
Thanks in advance
Re: Segmentation memory- question
Posted: Sun Sep 07, 2014 2:54 pm
by Peterbjornx
It is neither, IO space is address space mapped directly to peripheral registers, on a real 8086 an IO cycle would have a line asserted to signal that it was addressing IO and not memory, the IO device would then either latch the value on the bus or put its data on the bus depending on the kind of cycle(read,write)
Re: Segmentation memory- question
Posted: Mon Sep 08, 2014 6:27 pm
by azblue
Brendan wrote:
the segment's limit is only "byte granular" if the segment is 64 KiB or less (for larger segments you have "4 KiB granular");
Isn't it possible to have 1MB data segments? Not that that would be particularly useful, but the CPU does support that, doesn't it?
Re: Segmentation memory- question
Posted: Tue Sep 09, 2014 12:35 am
by Brendan
Hi,
azblue wrote:Brendan wrote:the segment's limit is only "byte granular" if the segment is 64 KiB or less (for larger segments you have "4 KiB granular");
Isn't it possible to have 1MB data segments? Not that that would be particularly useful, but the CPU does support that, doesn't it?
You're right - it's "byte granular" up to 1 MiB (and 4 KiB granularity for 1 MiB or larger segments). Basically, you can set the limit to 0x000FFFFF (1 MiB - 1 byte), but can't set it to 0x00100001 (1 MiB + 1 byte) and would have to use a limit of 0x00101000 (1 MiB + 4 KiB) instead.
Cheers,
Brendan