Virtual PC PAE?

[lweb20]

Have you tried running SGDT and SIDT (after doing LGDT and LIDT) in VirtualPC and printed the result? Did that surprise you?

Yes, I just try. The same result. Returns the same address.

Edit: This is what I have tried:

Code: Select all

inline void sgdt(uint32_t* location)
{
	asm("sgdt %0" : : "m"(*location) : "memory");
}

inline void sidt(uint32_t* location)
{
	asm("sidt %0" : : "m"(*location) : "memory");
}

...

	TablaGDTDescStruc TablaGDTD_copy;
	sgdt((uint32_t*)&TablaGDTD_copy);
	
	SCR::Write("GDTD: %#08X\n", &TablaGDTD);
	SCR::Write("GDTD base: %#08X\n", TablaGDTD.base);
	SCR::Write("GDTD size: %#08X\n", TablaGDTD.size);
	SCR::Write("GDTD_copy: %#08X\n", &TablaGDTD_copy);
	SCR::Write("GDTD_copy base: %#08X\n", TablaGDTD_copy.base);
	SCR::Write("GDTD_copy size: %#08X\n\n", TablaGDTD_copy.size);
	
	TablaIDTDescStruc TablaIDTD_copy;
	sidt((uint32_t*)&TablaIDTD_copy);
	
	SCR::Write("IDTD: %#08X\n", &TablaIDTD);
	SCR::Write("IDTD base: %#08X\n", TablaIDTD.base);
	SCR::Writer("IDTD base size: %#08X\n", TablaIDTD.size);
	
	SCR::Write("IDTD_copy: %#08X\n", &TablaIDTD_copy);
	SCR::Write("IDTD_copy base: %#08X\n", TablaIDTD_copy.base);
	SCR::Write("IDTD_copy size: %#08X\n", TablaIDTD_copy.size);

I have attached a screenshot.



EDIT 2:

Haha PAE paging works correctly with 4KB pages. But how detect 2MB pages

EDIT 3:

From Intel Manual: Volume 3B System Programming Guide, Part 2

The Pentium processor extended the memory management/paging facilities of the IA-32 to allow large (4 MBytes)
pages sizes (see Section 4.3, “32-Bit Paging”). The first P6 family processor (the Pentium Pro processor) added a 2
MByte page size to the IA-32 in conjunction with the physical address extension (PAE) feature (see Section 4.4,
“PAE Paging”).
The availability of large pages with 32-bit paging on any IA-32 processor can be determined via feature bit 3 (PSE)
of register EDX after the CPUID instruction has been execution with an argument of 1. (Large pages are always
available with PAE paging and IA-32e paging.)

My OS detects a Pentium 2 or later. I think that Virtual PC is buggy

I expected to have support for PAE 2MB pages but I have no way to detect it. Virtual PC indicates that PSE and PAE are available but it is not true.

I think there is no solution. I have 2 options, either I enable support for 3 types of paging (legacy paging, PAE 4KB and PAE 2MB having a detection method) or just omit the Virtual PC staying with the first 2 methods.

[SpyderTL]

CPUID(EAX=1)

EDX Bit 3: Page Size Extension
Large pages of size 4 MByte are supported, including
CR4.PSE for controlling the feature, the defined dirty bit in PDE (Page
Directory Entries), optional reserved bit trapping in CR3, PDEs, and PTEs.

EDX Bit 6: Physical Address Extension.
Physical addresses greater than 32 bits are
supported: extended page table entry formats, an extra level in the page
translation tables is defined, 2-MByte pages are supported instead of 4
Mbyte pages if PAE bit is 1. The actual number of address bits beyond 32 is
not defined, and is implementation specific.


When I run Virtual PC on Win7, I get bit 6 set and bit 3 cleared. (Which is the opposite of what you would expect, but perhaps you can use these two bits to figure out whether to use 2MB pages or not...)

On VirtualBox, both bits are set.

[lweb20]

CPUID(EAX=1)

...

When I run Virtual PC on Win7, I get bit 6 set and bit 3 cleared. (Which is the opposite of what you would expect, but perhaps you can use these two bits to figure out whether to use 2MB pages or not...)

On VirtualBox, both bits are set.

I said this:

FEATURES (EDX)
0x7C0A97B
111110000001010100101111011

Is the result in CPUID(EAX=1) I just checked. Bits 3 and 6 is set. I have Windows 7 x64 with VirtualPC x64. Probably is that?

Edit:
Oh my god!

I detected the problem:

CPUID(1, EDX) Bit 17, PSE-36, 36-bit Page Size Extension

From CPUID Intel:

Indicates whether the processor supports 4-MB pages that are capable of addressing physical
memory beyond 4-GB. This feature indicates that the upper four bits of the physical address of the 4-
MB page is encoded by bits 13-16 of the page directory entry.

This is the bit I have to check. Problem solved. Thanks

[SpyderTL]

Sorry, I got "Page Size Extensions" and "36-bit Page Size Extensions" (DX bit 17) mixed up...

In VirtualBox and VMware, I get PSE, PSE-36, and PAE all set.

In VirtualPC, I only get PSE and PAE set. PSE-36 is clear.

I don't think that PSE-36 being clear should mean that 2MB pages are not supported, but you could use it that way until you find a better solution.

Edit: Beat me to it.

[lweb20]

Sorry, I got "Page Size Extensions" and "36-bit Page Size Extensions" (DX bit 17) mixed up...

In VirtualBox and VMware, I get PSE, PSE-36, and PAE all set.

In VirtualPC, I only get PSE and PAE set. PSE-36 is clear.

I don't think that PSE-36 being clear should mean that 2MB pages are not supported, but you could use it that way until you find a better solution.

Edit: Beat me to it.

Yes, sure. That is a good temporary solution

I am very crazy

Code: Select all

void pag_legacy_install()
{
	
}

void pag_legacy_large_install()
{
	
}

void pag_pae_install()
{
	
}

void pag_pae_large_install()
{
	
}