Re: How do you tell what processor/core your code is running
Posted: Fri Apr 15, 2011 2:46 pm
Come to think of it. Providing an IDT per core could solve the issue with double fault TSS handlers, giving each core it's own TSS, so simultanious double faults would not trigger tripple faults. The fault handlers in the IDT (the first 32 entries) could be kept per core, and then the rest of the IDT could be shared with paging just as is the case of GDT sharing. For this two work, the aliasing must occur after the final fault handlers are setup, which would be after AP cores are started but before they are scheduled. The space per core before the first 32 IDT entries could be used for the TSS handler for double fault (and possibly some other exception handled with TSS).