wrote bootsector, how to proceed next?

[os64dev]

Hi All,

I have finished my bootsector which switches to unreal mode, then loads a number of sectors (max. to fill region 0x07C00-A0000) from the boot drive and switches to long mode(thanks brendan for the pointers). The bootsector works with floppy, harddrive and usb sticks(in floppy or harddrisk mode) without any code modification. So i was rather pleased, to see this all fit in 510 bytes of code & data.

As has become clear my OS will be completely 64-bit. but i'm struggling to find the next step. I want my OS to support multitasking on multiple cores. So what do do next: can i start my other processors/cores without the need for an IDT. How do i find these cores? etc..

Hope you people can give me some pointers.

Regards,

os64dev

[Brendan]

Hi,

So what do do next: can i start my other processors/cores without the need for an IDT. How do i find these cores? etc..

You can start the other processors/cores without any IDT (they start with interrupts disabled in real mode).

To detect the CPUs you need to scan the ACPI tables or the MPS (Intel's Multiprocessor specification) tables. These will tell you how many CPUs are present, where the I/O APICs and local APICs are, etc. For hyper-threading, the ACPI tables will report all logical CPUs (unless hyper-threading is disabled in the BIOS), while the MPS tables will only report physical CPUs. For a "64=bit only" OS I'd probably just use ACPI and forget about the older MPS tables.

For actually starting the CPUs the best description/algorithm I've seen is in Intel's MPS, but this is a generic algorithm and includes CPUs with external local APICs (only found in 80486 and early pentium systems), which can be skipped.

The sequence (for modern systems only) involves sending a special sequence of IPIs (Inter-Processor Interrupts) from one CPU to the CPU being started. This sequence is:

• - send an "INIT-IPI"
  - a 10 ms delay
  - send a "SIPI-IPI"
  - a 200 us delay
  - send another "SIPI-IPI"
  - another 200 us delay

I've found that on most systems the second SIPI isn't needed, and unless your timing is very accurate (which is painful to do in early boot code IMHO) it can cause problems. For example, a new CPU could execute some OS code, then get the second SIPI and execute the same OS code again, causing problems with any locks or counters, etc.

Instead of Intel's method I use my own, which works without needing accurate timing (i.e. it works with the PIT timer's 55 ms delays). My method goes like this:

• - wait for the timer IRQ (so we know how long until the next IRQ)
  - send the INIT IPI
  - wait for the timer IRQ (a 55 ms delay)
  - send the SIPI IPI
  - wait for several timer IRQs (a 220 ms delay)
  - if the CPU is running, skip the remaining steps
  - send the SIPI IPI again
  - wait for several timer IRQs (a 220 ms delay)
  - if the CPU still isn't running, display an error message and refuse to boot

For this to work the CPU being started needs to set some sort of flag (or increment a counter) to tell the first CPU that it is running. This isn't too hard to do...


Cheers,

Brendan

[os64dev]

Which entry defines the CPU cos i looked through the spec but seem to read pass it. Found the APIC related structures but the processors no such luck. I'm problably tired and slowly going blind .

Thanx for the info thus far..