I have a weird problem.... I'll try my level best to explain it clearly....
ATA Device (Hard Disk) is configured for DMA mode.
So While Settting up the PRD Table, I Need the Absolute Address of the Buffer where
DMA will write the data that is read from diskl....
Case 1 : - When i'm running in Kernel Mode (Page Table & Real Mem is one - to - one mapped)... there
is no problem as the virtual and real address are same.... (Or Virutal + Seg Base = Absoulte)
Work Fine ....
Case 2 : - When i'm in User Mode / User Process (Uses a different Page Table), to get the Absoute Address I enter into Kernel Mode and get the Absolute address of the Buffer by reverse engineering (back calculation) on the Page Table of the User Process.
I'm using qemu Emulator.
Case 1 works fine both on Real and Emu
But When it comes to Case 2:- It Works only on Emu
But on Real PC, The System neatly raises IRQ 14 (Hard Disk Primary IRQ) after DMA and finishes Reading but the data will not be available in the destination buffer.
Thanks for reading....
Also Thanks for solution / suggestion in advance
Problem with HardDisk Read
Problem with HardDisk Read
Last edited by prajwal on Sun Nov 26, 2006 7:05 am, edited 1 time in total.
as i was busy changing my job, my os work was down.... This was my last problem at which I stopped my os dev.
I found the solution to the above problem, thought to share this so that others (if any) with a similar problem would get benefited...
ok.. the problem was because of not understanding the PRD Table structure / format. After going thru the PC87415 (DMA IDE master mode interface controller), it was clear that the LSB bit of address field should be 0 and LSB bit of Byte length field should be 0. That literally means, the address to/from where dma has to write/read data should be even(multiple of 2) and the no. of bytes to transfer should again be a multiple of 2 (even)....
Case 1 above was working because coincidently the address was even and in Case 2 the address was odd....
But, things were going fine on Qemu emulator with this bug, Now the bug is fixed (made sure that address will be multiple of 2) and works fine on real pc as well....
shortly i'll be releasing my next version... wait madi
I found the solution to the above problem, thought to share this so that others (if any) with a similar problem would get benefited...
ok.. the problem was because of not understanding the PRD Table structure / format. After going thru the PC87415 (DMA IDE master mode interface controller), it was clear that the LSB bit of address field should be 0 and LSB bit of Byte length field should be 0. That literally means, the address to/from where dma has to write/read data should be even(multiple of 2) and the no. of bytes to transfer should again be a multiple of 2 (even)....
Case 1 above was working because coincidently the address was even and in Case 2 the address was odd....
But, things were going fine on Qemu emulator with this bug, Now the bug is fixed (made sure that address will be multiple of 2) and works fine on real pc as well....
shortly i'll be releasing my next version... wait madi