Basic paging not working

[CyberP1708]

Hello,

I am trying to implement paging in my o/s
First I have simply copy - pasted the code taken from this tutorial and it was working

My idea now was to map virtual memory exactly as physical memory (identity mapping or something like that)

Here are some definitions:

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typedef unsigned int pageEntry;

pageEntry pageDirectory[1024];
pageEntry* pageTable = (void*)0x200000;

And here is the initialisation code:

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printf("Initialisating page directory... ");
for (i = 0; i < 1024; ++i) {
   pageDirectory[i] = (unsigned int)(pageTable + i * 1024 * sizeof(pageEntry)) | 3;  // each entry points to another page table
}
printf("ok\r");
printf("Initialisating page tables... ");
for (i = 0; i < 1024 * 1024; ++i) {  // we write every page tables at once
   pageTable[i] = (i << 12) | 3;  // each entry to another page
}
asm("mov %%eax, %%cr3" : : "a"(pageDirectory));
printf("ok\r");

I just wanted a page directory linking to every page tables which occupy a contigunous space of 4 MB.
Each page has the flags "read/write" and "present" (set by the "| 3").

But as soon as I enable paging the kernel crashes and BOCHS tells me that it crashed because of "page not present".
As the page fault exception handler is also on a "page not present", the whole computer crashes.

[Pype.Clicker]

beware of constructs such as

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pageTable + i * 1024 * sizeof(pageEntry)

"pageTable + 1" takes you one pageEntry further than the address in pageTable, not 1 byte further ... this may explain that...

[Kemp]

I notice there have been a lot of problems related to not understanding incrementing pointers recently. Maybe this should be added to one of our "read first" threads or faq entries?

[matthias]

Did you enable the PE bit in cr0? Because I don't see it in your code If you want to I can provide you some sample code that does what you want.

[CyberP1708]

Thanks for your answers

beware of constructs such as
Code:

pageTable + i * 1024 * sizeof(pageEntry)

"pageTable + 1" takes you one pageEntry further than the address in pageTable, not 1 byte further ... this may explain that...

Thank you, it was an inattention mistake but.... still now working

I replaced the line with:

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pageDirectory[i] = (unsigned int)(((unsigned int)pageTable) + i * 1024 * sizeof(pageEntry)) | 3;

Did you enable the PE bit in cr0? Because I don't see it in your code

Yes I have enabled it :-/
These lines are at the end of the ISR of IRQ0 (for multithreading):

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mov eax, cr0
or eax, 0x80000000
mov cr0, eax

If I disable these lines, everything works perfectly

If I replace the last lines of the main code (the code I pasted in the first post) with this...

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...
asm("mov %%eax, %%cr3" : : "a"(pageDirectory));
asm("mov %cr0, %eax; or 0x80000000, %eax; mov %eax, %cr0");
printf("ok\r");
while(1) asm("hlt");

...it doesn't work either (as it probably crashes either in reading the next instruction or writing to 0xB8something in the printf function)

[Pype.Clicker]

well, i'd suggest you set a breakpoint in bochs just after your "mov cr3, eax", and dump physical memory at your page tables and page directory to make sure everything is in place ...

oh, just a thought: make sure your page directory is aligned on a page boundary, too. If you load CR3 with 0x12345678, the cpu will blissfully ignore the "678" part and consider your pdir starts at 0x12345000

[CyberP1708]

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oh, just a thought: make sure your page directory is aligned on a page boundary, too. If you load CR3 with 0x12345678, the cpu will blissfully ignore the "678" part and consider your pdir starts at 0x12345000 

Thank you, that was the problem
I have written the page directory on a page boundary and it is now working
I thought that as CR3 can contain 32 bits, it would not ignore the 12 last ones

[Pype.Clicker]

I thought that as CR3 can contain 32 bits, it would not ignore the 12 last ones

The ways of Intel are sometimes obscure to the mere mortals, aren't they? I think the Holy Manuals are pretty clear on this one, though ;D