Division by zero at BT instruction

[kataklinger]

Ok, whatever, thank you all for your answers, i'll find that error, my code, my problems.

Well, we cannot help you if you don't provide us enough information

[Phugoid]

Specifically, you did not say what effect removing the "sti" instruction had on the code.

As for whether disassembly is the same as assembly, consider: did you really write db 0xFF in the middle of your code, or [di-0x0d]? Did you really write jz near 0xb50, or perhaps you used a label in place of the address?

[xsix]

Code where fault coems is really short, because my keyboard input procedure calls one more, which i named until_has_data, which waits for 64h port will set Output bit:

until_has_data:
sti
in al, 64h ;Get keyboard status
and al, 00000001b

jz input1 ;Yup, data has arrived
jnz until_has_data ;Nah, no data

There is AND AL, there is fault. I've tested with AND, TEST, BT and nothing helped. Removing STI also doesn't help.

[xsix]

No sorry. Now kernel just halts, because IF=0 and keyboard IRQ doesn't fire an IRQ signal, so...

[kataklinger]

Ok, it means that hardware interrupts are not handled correctly. Have you enabled IRQ0 line (_not_ IRQ1) at PIC? Is it si enabled, and if you didn't remapped PIC correctly, then it sends vector 0 for irq0, vector 1 for irq1 ... but it should send vector 0x20, 0x21, 0x22... and thats why you get Divide By Zero Exception.

<edit>
Why are you pooling keyboard when you are using interrupts?
</edit>

[xsix]

Here is some moths ago, my self written PIC remapping code:

Code: Select all

reprogramm_pic:
cli                ;Disable IRQs
mov al, 00010001b  ;Initialization bit, and edge triggered IRQ(2PICs)
out 20h, al        ;I'll use 2PICs so i need to initialize both
out 0xA0, al
       
mov al, 20h        ;For master. Base of IRQ0. Bits 210 not used
out 21h, al        ;To second port
mov al, 28h        ;For slave
out 0xA1, al       ;To second port of slave

mov al, 0x02       ;3rd ICW. Used only if bit 1 was set.
out 21h, al        ;Connect to second PIC via IRQ2
mov al, 0x02
out 0xA1, al       ;Connect to master via IRQ2

mov al, 0x01       ;This is needed if bit 1 was set
out 21h, al        ;To master and slave
out 0xA1, al       ;Byte of ICW4. Bit0 indicates that this is x86PC. bit 1 indicates that EOI is handled manualy
sti                ;Enable IRQs

mov al, 00000000b  ;Mask port, unmask all IRQs, of the first PIC
out 21h, al

I thinik it correct, as i said works on another computer. I figured out that fualt comes at 100BD3 address. My kernel is located at 1024*1024+1024(100400h byte) in HMA, i've changed everything there into NOP's and fault still comes...

[Pype.Clicker]

well, at least i would make sure the mask is redefined _before_ i enable interrupts with sti.

Moreover, i once had trouble when no "wait states" are introduced between the different stages of the initialization (e.g. between ICW1 and ICW2). You may prefer

Code: Select all

        mov al,11h
        out 20h,al      ;ICW1:=__init__         ;master
        out 0A0h,al     ;ICW1:=__init__         ;slave
        call __wait
        mov al,bl
        out 21h,al      ;ICW2:=irq0slot (0x20)
        mov al,bh
        out 0A1h,al     ;ICW2:=irq8slot (0x28)
        call __wait
        mov al,4        ;bit 2 set => master recieves on irq 2 
        out 21h,al      ;ICW3:=IRQ2 (Attach)
        mov al,2        ;valeur=2 => slave sends to irq 2
        out 0A1h,al     ;ICW3:=IRQ2 (Attach)
        call __wait
;       mov al,1
        mov al,0xd
        out 21h,al      ;ICW4:=IntelEnvironnement
        mov al,9
        out 0A1h,al     ;ICW4:=IntelEnvironnement
        call __wait

and

Code: Select all

__wait:
        in al,21h       ;just a tiny delay to let the bus resting
        in al,0A1h      ;Should be enough on any architecture
        ret

Official works-for-all code is available in the FAQ:
Can I Remap the PIC

[kataklinger]

mov al, 0x02
out 21h, al
mov al, 0x02
out 0xA1, al

Bolded code should looks like this:
mov al, 0x04
You have connected slave PIC to irq1 (not 2) of master. ICW3 = 0x4 for master and 0x2 for slave!

mov al, 0x01
out 21h, al
out 0xA1, al

Use this instead:

mov al, 0x5
out 0x21, al
mov al, 0x1
out 0xa1, al

You didn't tell that master PIC is master (ICW4 = 0x5 for master an 0x1 for slave).

As Pype said: mask all interrupts at PIC before you execute STI.

[xsix]

Really thank you, all. I tried but i still get a fault... I think, i'll rewrite the whole code, it's just 34kylobytes of asm code. In the fact there are a lot of not needed things so one more point to rewrite it instead of repairing. Thank you anyway.

[xsix]

Mm... I want to thank you all that helped me, because you were right that PIC is programmed bad, and it's correct, i've just fixed, and it works. I'm happy. Thanks

[kataklinger]

Of course we were right ;D