[continued]
Adek336 wrote:How can I get a list of the pci-cards? What info will I get?
You'd get a list of PCI devices (which includes the PCI host controller, PCI to PCI bridges, the PCI to LPC bridge and PCI devices built into the motherboard, not just PCI cards) by scanning the PCI bus (or busses - some computers have multiple PCI host controllers). Exact details of how to perform this scan would justify a book, although I will provide an overview and the list of reference material I used if requested.
The information you get for each device includes the VendorID and DeviceID of the device, the resources it's currently configured for, the class of device it is, and possibly the software interface it uses (if it's a standardized device type, like an IDE or USB controller) .
Adek336 wrote:How does the memory-mapped IO work?
At a conceptual level, the CPU can be thought to have an address bus, a data bus and an "IO select". When you do "OUT 0x12,0x34" or "MOV [0x12],0x34" the CPU puts the same signals on both the address bus and data bus, with the only difference being the state of the IO select. If the hardware completely ignored this IO select then there would be no difference between IO port access and a normal memory access.
On "PC compatible" computers hardware doesn't ignore the state of the IO select. For example, the RAM controller won't respond to a request on the bus if the IO select says the request is for IO space. Other devices may choose to use IO space for some things and/or memory space for others. A video card would use IO space for some things and memory space for others, but may also support different "modes" where the card responds to memory space requests instead of IO space requests. This is memory mapped IO, at the "PC compatible" hardware level.
Some architectures don't have a logically seperate IO space and memory space, so that everything is memory mapped IO (as would be the case if the CPU's IO select was ignored or didn't exist). The Commodore 64 was like this, where the video controller chip, sound chip, etc were all assigned regions of the address space
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In addition it's possible for the operating system to emulate memory mapped IO. In this case an area is reserved such that accessing it results in an exception (page fault or general protection fault), and the exception handler decodes the instruction used and performs the associated IO port access (I wouldn't recommend it).
Cheers,
Brendan
