weird stack

[DruG5t0r3]

I have something odd going on here.

I pushed this onto the stack. Compiled with nasm

push ds
push es
push fs
push gs


but looking at the stack, it actually pushed double words (4 bytes). Not 2 bytes as a segment register should be. Any thoughts?

[AR]

In 32bit mode, stack operations are always 32bits (4 bytes). When you "pop ds", it will remove 32bits from the stack but only loads the first 16 into DS.

As a side note: Do not prefix in the instructions with o16, if you do you will make a mess of the C handler:

Code: Select all

void ISR(..., unsigned int FSandGS, unsigned int DSandES, ...)

or

Code: Select all

struct SegRegs { unsigned short FS, GS, DS, ES; } __attribute__((__packed__));
void ISR(..., SegRegs sr, ...)

[Pype.Clicker]

Get a look at intel manuals ... that's exactly what's supposed to happen (for performance, alignment and another couple of GoodThings)

[DruG5t0r3]

thanks guys...its just thats its a little ugly for my reg struct...

struct regs { unsigned short ds, unsigned short pading...

you get the idea...

[Pype.Clicker]

you have the option of declaring 'pure-padding' fields too!

Code: Select all

struct regs {
     unsigned short ds;
     unsigned :16;
     unsigned short es;
     unsigned :16;
     ...
};

iirc, that's even ANSI C

[Colonel Kernel]

you have the option of declaring 'pure-padding' fields too!

Anonymous bitfields... hadn't thought of trying that. I wonder if Doxygen will choke on them though...

[zyp]

What if you just use unsigned int?
Are the upper two bytes zeroed, or may they contain garbage?

[DruG5t0r3]

i've tried, it doesn't work, padding does.