PAE
Re:PAE
PSE and PAE can yield up to 64 gb of _virtual_ memory. 0xFFFFFFFFF or 36 bits.
PSE was introduced on Pentium IIIs
PAE on Pentium Pro
I personnaly prefer PSE, takes less Page tables overhead.
But the fact remains that you are still limited to 4gb of physical memory. The only way to get more would be to get an AMD64 cpu to get more than a potential 4gb.
PSE was introduced on Pentium IIIs
PAE on Pentium Pro
I personnaly prefer PSE, takes less Page tables overhead.
But the fact remains that you are still limited to 4gb of physical memory. The only way to get more would be to get an AMD64 cpu to get more than a potential 4gb.
- Colonel Kernel
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Re:PAE
That's not my understanding of how PAE works (I'm not as familiar with PSE) -- I think you got it backwards. With PAE, linear addresses are still 32-bit, but physical addresses are extended to 36 bits (i.e. -- there are actually 4 additional address pins on the processor). This means you can have up to 64 GB of physical memory, but each process still only has a 4 GB address space.
PAE stands for "physical" address extension, after all.
PAE stands for "physical" address extension, after all.
Top three reasons why my OS project died:
- Too much overtime at work
- Got married
- My brain got stuck in an infinite loop while trying to design the memory manager
Re:PAE
Right, I got it completely reversed...silly me
It's actually 4gb of virtual space accessible at one point, and 64gb of physical memory.
straight from the manual Volume 3 ->
It's actually 4gb of virtual space accessible at one point, and 64gb of physical memory.
straight from the manual Volume 3 ->
The page-table structure described in the previous two sections allows up to 4GBytes of the 64 Gbyte extended physical address space to be accessed at one time. Addtional 4-GByte sections of physical memory can be addressed in either two way:
Change the pointer in register CR3 to point to another page-directory-pointer table, which in turn points to another set of page directories and page tables.
Change entries in the page-directory-pointer table to point to other page directories, which in turn point to other sets of page tables.
Re:PAE
Hi,
Also CR3 is still 32 bit. This means your physical memory manager will need a special function to return a physical page below 4 GB.
The general idea is that CR3 points to a "page directory pointer table", which contains 4 entries - one page directory per entry. Each page directory entry and page table entry becomes a 64 bit entry, so that a 4 KB page directory holds 512 entries and controls 1 GB of linear address space. Each page table also holds 512 entries and controls 2 Mb of linear address space.
Cheers,
Brendan
You can't create 36 bit variables with GCC (use 64 bit variables instead). The CPUs registers are all still 32 bit, so you'd end up using a pair of them to hold a physical address (e.g. edx:eax) to hold a physical address.Guest wrote: Hello, i have heard if the PAE bit is set you have 64 GB physical memory. But how to create 36bit variables with the gcc ? Are the registers 36bit too ?
Also CR3 is still 32 bit. This means your physical memory manager will need a special function to return a physical page below 4 GB.
The general idea is that CR3 points to a "page directory pointer table", which contains 4 entries - one page directory per entry. Each page directory entry and page table entry becomes a 64 bit entry, so that a 4 KB page directory holds 512 entries and controls 1 GB of linear address space. Each page table also holds 512 entries and controls 2 Mb of linear address space.
Cheers,
Brendan
For all things; perfection is, and will always remain, impossible to achieve in practice. However; by striving for perfection we create things that are as perfect as practically possible. Let the pursuit of perfection be our guide.
Re:PAE
Hi,
PAE doesn't work in BOCHS either - if you enable it then CPUID will report that it's supported, even though it's not (not sure about the latest beta release though).
Cheers,
Brendan
I don't think so - my OS says that QEMU's CPU doesn't support PAE (and I can't remember seeing a compiler or command line option for it).Guest wrote: is PAE possible with QEMU ?
PAE doesn't work in BOCHS either - if you enable it then CPUID will report that it's supported, even though it's not (not sure about the latest beta release though).
Cheers,
Brendan
For all things; perfection is, and will always remain, impossible to achieve in practice. However; by striving for perfection we create things that are as perfect as practically possible. Let the pursuit of perfection be our guide.
- Pype.Clicker
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Re:PAE
So it seems bochs fully support PAE. However, since bochs uses virtual memory from the host system to emulate physical memory from the virtual machine, you're *very* unlikely to manage setting up a bochs with >2GB memory (it may work better on a 64bit system .. can't tell for sure).~/install/_dev/bochs-cvs/configure --help
...
--enable-4meg-pages support 4Megabyte pages extensions
--enable-pae support Physical Address Extensions
...
Re:PAE
Hi,
To make sure I'm not mistaken (as the last time I tried was about 6 months ago) I compiled Bochs with PAE support and tried again. I used the following options:
The test machine was a Dual Pentium III server running Gentoo Linux.
The normal version of my OS (which doesn't try to use PAE) ran without any problems. The "force PAE" version of my OS crashed during paging initialization (triple fault caused by exception 14). Both versions of the OS work fine on real computers (i.e. the PAE code works fine on my Pentium 4 and Dual Pentium III).
During these tests Bochs was configured to use 8 Mb of memory, so attempting to use > 2 Gb isn't an issue. AFAIK Bochs has trouble trying to use more than half of the computer's memory (on my 256 MB Pentium 4 I couldn't get Bochs to use more than 128 Mb with or without PAE).
Please note that the only version of Bochs tested was Bochs 2.1.1. There's a new/beta version (Bochs 2.2 Beta) that I haven't tried yet, which may support PAE properly.
I haven't tested support for PSE in any version of Bochs (and probably never will) as my OS doesn't use it.
If anyone can contradict this, or if anyone has tried out Bochs 2.2 Beta, let me know .
As previously mentioned QEMU doesn't support PAE in any way. Not sure about Virtual PC or VMware...
Cheers,
Brendan
Bochs 2.1.1 has a compile time option to support PAE. When this option is enabled CPUID will report that PAE is supported, but if the OS attempts to enable PAE it will not work. If I remember correctly, CR3, the page directory and page tables all behave the same as if PAE is not enabled (there is no page directory pointer table or 64 bit PD and PT entries).Pype.Clicker wrote:So it seems bochs fully support PAE. However, since bochs uses virtual memory from the host system to emulate physical memory from the virtual machine, you're *very* unlikely to manage setting up a bochs with >2GB memory (it may work better on a 64bit system .. can't tell for sure).~/install/_dev/bochs-cvs/configure --help
...
--enable-4meg-pages support 4Megabyte pages extensions
--enable-pae support Physical Address Extensions
...
To make sure I'm not mistaken (as the last time I tried was about 6 months ago) I compiled Bochs with PAE support and tried again. I used the following options:
Code: Select all
./configure --enable-cpu-level=6 --enable-idle-hack --enable-port-e9-hack --enable-pci --enable-usb --disable-reset-on-triple-fault --enable-disasm --enable-readline --enable-vbe --enable-all-optimizations --enable-pae --enable-cdrom
The normal version of my OS (which doesn't try to use PAE) ran without any problems. The "force PAE" version of my OS crashed during paging initialization (triple fault caused by exception 14). Both versions of the OS work fine on real computers (i.e. the PAE code works fine on my Pentium 4 and Dual Pentium III).
During these tests Bochs was configured to use 8 Mb of memory, so attempting to use > 2 Gb isn't an issue. AFAIK Bochs has trouble trying to use more than half of the computer's memory (on my 256 MB Pentium 4 I couldn't get Bochs to use more than 128 Mb with or without PAE).
Please note that the only version of Bochs tested was Bochs 2.1.1. There's a new/beta version (Bochs 2.2 Beta) that I haven't tried yet, which may support PAE properly.
I haven't tested support for PSE in any version of Bochs (and probably never will) as my OS doesn't use it.
If anyone can contradict this, or if anyone has tried out Bochs 2.2 Beta, let me know .
As previously mentioned QEMU doesn't support PAE in any way. Not sure about Virtual PC or VMware...
Cheers,
Brendan
For all things; perfection is, and will always remain, impossible to achieve in practice. However; by striving for perfection we create things that are as perfect as practically possible. Let the pursuit of perfection be our guide.
Re:PAE
Hi,
Just a quick note..
I've been playing with Bochs 2.2 Beta, and it has the same problems under the same conditions as Bochs 2.1.1 (i.e. incomplete PAE support).
BTW the new/beta version does seem to be at least as stable as the previous version of Bochs, with a number of new features that I haven't tried yet (more PCI and USB support).
Cheers,
Brendan
Just a quick note..
I've been playing with Bochs 2.2 Beta, and it has the same problems under the same conditions as Bochs 2.1.1 (i.e. incomplete PAE support).
BTW the new/beta version does seem to be at least as stable as the previous version of Bochs, with a number of new features that I haven't tried yet (more PCI and USB support).
Cheers,
Brendan
For all things; perfection is, and will always remain, impossible to achieve in practice. However; by striving for perfection we create things that are as perfect as practically possible. Let the pursuit of perfection be our guide.
Re:PAE
just a small note on the PSE vs PAE discussion:
PSE allows 36-bit physical addresses. It stands for Physical Size extension, where Size should be doubly-interpreted. You can access more memory, but only in 4M pages. You can only use the >4G part in pieces of 4M. It works by reducing the amount of bits used on the right side of the linear address (which should be 0 anyway with 4M pages) and replaces that with the upper few bits of the linear address, effectively making more memory available. The 4k pages are identical, so it would work nicely along with all existing OSes with very minor modification.
PAE allows 36-bit addresses by doubling the size of the page entries. This allows more memory to be used with 4k pages but it does take up more memory with page tables. For current computers, the more memory is a null argument (nobody has more than 4G of memory) so it's mainly less usable. For AMD64 however, this is required.
You can also combine them, using both PAE and PSE. Because of the larger page entry sizes of PAE you get 2M PSE pages, but they are kept in the same TLB entries (that are nonshared with the 4k ones, therefore efficient).
So, short overview finished.
My experience with Bochs and PAE is that it crashes as soon as you modify CR4 with that bit. This was with a build that supported x86-64 (called back then, now it's amd64) so I 100% certainly did compile the support in. I contacted bochs people about it, but they took a year to contact me and at that time I kind of ignored bochs so I didn't have a binary ready.
PSE allows 36-bit physical addresses. It stands for Physical Size extension, where Size should be doubly-interpreted. You can access more memory, but only in 4M pages. You can only use the >4G part in pieces of 4M. It works by reducing the amount of bits used on the right side of the linear address (which should be 0 anyway with 4M pages) and replaces that with the upper few bits of the linear address, effectively making more memory available. The 4k pages are identical, so it would work nicely along with all existing OSes with very minor modification.
PAE allows 36-bit addresses by doubling the size of the page entries. This allows more memory to be used with 4k pages but it does take up more memory with page tables. For current computers, the more memory is a null argument (nobody has more than 4G of memory) so it's mainly less usable. For AMD64 however, this is required.
You can also combine them, using both PAE and PSE. Because of the larger page entry sizes of PAE you get 2M PSE pages, but they are kept in the same TLB entries (that are nonshared with the 4k ones, therefore efficient).
So, short overview finished.
My experience with Bochs and PAE is that it crashes as soon as you modify CR4 with that bit. This was with a build that supported x86-64 (called back then, now it's amd64) so I 100% certainly did compile the support in. I contacted bochs people about it, but they took a year to contact me and at that time I kind of ignored bochs so I didn't have a binary ready.
Re:PAE
Hi,
The main reason I'm not intending to use PSE is because my OS doesn't use anything as large as 4 Mb anywhere, and using both 4 KB and large pages at the same time complicates swapping, NUMA, and memory management in general. IMHO if the computer has over 4 GB of RAM I can afford to waste some memory on page tables, etc (my OS uses plain ole' paging if there's less than 4 GB of RAM, unless I force the OS to use PAE for testing purposes). The only thing I really miss is the extra TLB caching, which is a shame.
Anyway, I've decided to add an emulator to my list - a huge OS project, a huge compiler project, then a huge emulator project. Now all I need is immortality ;D.
Cheers,
Brendan
This is a good overview .Candy wrote:So, short overview finished.
The main reason I'm not intending to use PSE is because my OS doesn't use anything as large as 4 Mb anywhere, and using both 4 KB and large pages at the same time complicates swapping, NUMA, and memory management in general. IMHO if the computer has over 4 GB of RAM I can afford to waste some memory on page tables, etc (my OS uses plain ole' paging if there's less than 4 GB of RAM, unless I force the OS to use PAE for testing purposes). The only thing I really miss is the extra TLB caching, which is a shame.
In my experience (with the recent versions of Bochs only) you can enable PAE in CR4 before paging is enabled, but as soon as you enable paging Bochs will die because it doesn't translate linear->physical correctly (which I find strange considering how similar PAE is to 64 bit paging). My memory might be deceiving me though - I might investigate this futher and submit a bug report to the Bochs developers...Candy wrote:My experience with Bochs and PAE is that it crashes as soon as you modify CR4 with that bit. This was with a build that supported x86-64 (called back then, now it's amd64) so I 100% certainly did compile the support in. I contacted bochs people about it, but they took a year to contact me and at that time I kind of ignored bochs so I didn't have a binary ready.
Anyway, I've decided to add an emulator to my list - a huge OS project, a huge compiler project, then a huge emulator project. Now all I need is immortality ;D.
Cheers,
Brendan
For all things; perfection is, and will always remain, impossible to achieve in practice. However; by striving for perfection we create things that are as perfect as practically possible. Let the pursuit of perfection be our guide.
- Colonel Kernel
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Re:PAE
IIRC, there are two different flavours of PSE: PSE, and PSE-36. What you're describing sounds like PSE-36. "Vanilla" PSE just gives you 4 MB pages without increasing the address space.Candy wrote:PSE allows 36-bit physical addresses.
Too many acronymns to remember...
Top three reasons why my OS project died:
- Too much overtime at work
- Got married
- My brain got stuck in an infinite loop while trying to design the memory manager
Re:PAE
Did, didn't work. Contact [email protected] directly for a quicker reply (he replied but I didn't have the disk image... after a year).Brendan wrote:My memory might be deceiving me though - I might investigate this futher and submit a bug report to the Bochs developers...Candy wrote:My experience with Bochs and PAE is that it crashes as soon as you modify CR4 with that bit. This was with a build that supported x86-64 (called back then, now it's amd64) so I 100% certainly did compile the support in. I contacted bochs people about it, but they took a year to contact me and at that time I kind of ignored bochs so I didn't have a binary ready.
Wanna work along? I'm also in for the project, all supporting libs, a compiler + assembler + compiler generating tools + libraries for that, a browser, text editor (plain plus a OO ish one), dev environment, music / video player, irc client and some server ish function but that last one is optional.Anyway, I've decided to add an emulator to my list - a huge OS project, a huge compiler project, then a huge emulator project. Now all I need is immortality ;D.
Oh, and I think I might need a day job. If you figure out how to do immortality or no sleep ever, tell me. Could use that too
Re:PAE
Hi,
A good co-developer would be greatly appreciated . Unfortunately any development tools, emulators, etc that I'm involved with need to work for my OS, and my OS project deviates from standard practice. The OS itself relies on distributed peer-to-peer techniques built on the principle of non-blocking messaging (which makes things like a standard ANSI C library impractical, and porting exisiting code from other OSs extremely time consuming).
Cheers,
Brendan
I want to give an explicit, detailed bug report - I figure the more information I can provide the quicker they might fix it (constantly rebooting to test PAE code costs me time). In addition to this I want to give them my "Standard Bochs Hacks" - with each new version of Bochs I add support for hyper-threading and code to automatically use the correct BIOS image depending on the number of CPUs Bochs was compiled for (part of the hyper-threading support is an additional 4 BIOS images). The end result is a directory containing 10 or more emulators, where any emulator can be started without modifying the "bochsrc.txt" file first. The most frequently used confugurations get mapped to hot-keys in KDE, so I can press F12 to compile the OS, F11 for QEMU, F10 for single CPU Bochs, F9 for dual CPU Bochs, etc (with shift+key invoking the debugging version) .Candy wrote:Did, didn't work. Contact [email protected] directly for a quicker reply (he replied but I didn't have the disk image... after a year).Brendan wrote: My memory might be deceiving me though - I might investigate this futher and submit a bug report to the Bochs developers...
Candy wrote:Wanna work along? I'm also in for the project, all supporting libs, a compiler + assembler + compiler generating tools + libraries for that, a browser, text editor (plain plus a OO ish one), dev environment, music / video player, irc client and some server ish function but that last one is optional.Brendan wrote: Anyway, I've decided to add an emulator to my list - a huge OS project, a huge compiler project, then a huge emulator project. Now all I need is immortality ;D.
A good co-developer would be greatly appreciated . Unfortunately any development tools, emulators, etc that I'm involved with need to work for my OS, and my OS project deviates from standard practice. The OS itself relies on distributed peer-to-peer techniques built on the principle of non-blocking messaging (which makes things like a standard ANSI C library impractical, and porting exisiting code from other OSs extremely time consuming).
Cheers,
Brendan
For all things; perfection is, and will always remain, impossible to achieve in practice. However; by striving for perfection we create things that are as perfect as practically possible. Let the pursuit of perfection be our guide.