IDT

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DarylD

IDT

Post by DarylD »

Everybody on here seems very knowledeable so here is *another* question.

I have entries in my IDT for exceptions/interrupts. The address in the IDT is the logical address i.e. 0x80000000+ in my case.

But if I don't have the real memory used by the interrupt routine mapped into the logical address space it will page fault on me.

I.e. the int 0x0 routine exists at 0x106000(ish), the entry in the IDT points to 0x80060000(ish). But it will triple fault without the 0x106000 mapped into logical address space.

Is this normal??
Jamethiel

RE:IDT

Post by Jamethiel »

If I'm interpreting your question correctly, no.

I'd check to make sure that your interrupt handlers aren't using an absolute code or data reference to the physical address instead of the logical address.

I can't for the life of me remember if the IDT location is interpreted as being in the logical or physical address space, but that might bear checking as well.
mikeleany

RE:IDT

Post by mikeleany »

I just read about this. If exceptions 0, 10, 11, 12, 13, or a page fault causes a page fault, this generates a double fault. If the double fault generates an exception, such as a page fault, this causes the computer to enter "shut-down mode", commonly known as triple-faulting. In other words, the interrupts mentioned must ALWAYS be in real memory to prevent double-faulting, and the double-fault interrupt must always be in memory to prevent triple-faulting. For more information see IA-32 Manual Vol 3 page 5-33 (http://developer.intel.com/design/Pentium4/manuals/).
DarylD

RE:IDT

Post by DarylD »

Thanks, that makes sense.

But they are in real memory, i.e. I am not paging any memory out yet. But I have to identity map the real memory into the logical address space or they triple-fault, i.e. the old shutdown trick.

Surely, as long as they are mapped correctly into the logical(virtual?) address space with a valid selector it should get the correct real address and execute.

I wanted to have the lower 2GB or memory space for my kernel to be totally user space, even if currently executing in the kernel.

Daryl.
mikeleany

RE:IDT

Post by mikeleany »

Oh, I think I understand. I think problem is that the address of the IDT that you load with LIDT is a linear address, not a logical one. The addresses of the interrupt routines are logical addresses though, so they shouldn't have to be identity mapped, theoretically. You don't have to map the IDT into any segment you don't want to, so you can leave the lower 2GB of the segment free for user space. I think that's what you meant, but I'm not quite sure what you mean by logical address. A logical address to me is the offset within a segment. The logical address is translated to a linear address by using the segment's base address in the GDT. Is that what you meant?
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