user threads

[oh boy]

I've got threads setup and now I'm trying to get user mode threads working.
When I switch to my user thread, bochs returns this error: "rpl != CPL".
I've checked and double checked that the CS of the new user thread is correct, and I have loaded the GDT with pl3 entries.

[Candy]

I've got threads setup and now I'm trying to get user mode threads working.
When I switch to my user thread, bochs returns this error: "rpl != CPL".
I've checked and double checked that the CS of the new user thread is correct, and I have loaded the GDT with pl3 entries.

How do you switch? You must use a form of arcane magic to switch to the user level stuff, because the other way around is complex too.

[Brendan]

Hi,

When I switch to my user thread, bochs returns this error: "rpl != CPL".
I've checked and double checked that the CS of the new user thread is correct, and I have loaded the GDT with pl3 entries.

What does the user thread's SS contain? You'd need to have the lowest 2 bits in SS set..

The lowest 2 bits in the CS register contain the CPL (Current Privilege Level) and the lowest 2 bits of the other segment registers contain those segment registers RPL (Requested Privilege Level).

For stack segments SS's RPL must be equal to CPL (and the DPL in the descriptor), otherwise you get a GPF.

See Intel's system programmer's manual, section 4.5 (Privilege Levels) and section 4.7 (Privilege Level Checking When Loading The SS Register) for more info...


Cheers,

Brendan

[Adek336]

This is most likely caused by small little errors in the source code
I used to have faults switching to user threads, as well, after hours of coding I decided to rewrite the interrupt stubs and the task switcher...
Look for things like, do you try to access the stack after poping the user ss?

Cheers,
~Adrian

[ohboy]

I solved this, but then instead I got another error:
"exception(): 3rd (13) exception with no resolution, shutdown status is 00h, resetting"

00147577557i[SYS ] Last time is 1093782969
00147577557i[CPU ] real mode
00147577557i[CPU ] CS.d_b = 16 bit
00147577557i[CPU ] SS.d_b = 16 bit
00147577557i[CPU ] | EAX=000e0616 EBX=0000d260 ECX=000e0004 EDX=00000401
00147577557i[CPU ] | ESP=0000ff78 EBP=0000ff8a ESI=00000000 EDI=00000500
00147577557i[CPU ] | IOPL=0 NV UP DI PL NZ NA PO NC
00147577557i[CPU ] | SEG selector base limit G D
00147577557i[CPU ] | SEG sltr(index|ti|rpl) base limit G D
00147577557i[CPU ] | DS:0000( 0000| 0| 0) 00000000 0000ffff 0 0
00147577557i[CPU ] | ES:07c0( 0000| 0| 0) 00007c00 0000ffff 0 0
00147577557i[CPU ] | FS:0000( 0000| 0| 0) 00000000 0000ffff 0 0
00147577557i[CPU ] | GS:0000( 0000| 0| 0) 00000000 0000ffff 0 0
00147577557i[CPU ] | SS:0000( 0000| 0| 0) 00000000 0000ffff 0 0
00147577557i[CPU ] | CS:f000( 0000| 0| 0) 000f0000 0000ffff 0 0
00147577557i[CPU ] | EIP=00000943 (00000942)
00147577557i[CPU ] | CR0=0x60000010 CR1=0x00000000 CR2=0x00000000
00147577557i[CPU ] | CR3=0x00000000 CR4=0x00000000


I ran it through bochsdbg and saw that all the registers were correct on the iret. Am I getting an interrupt? Why doesn't it work, I've setup a TSS for stack switching with ss0 = pl0 segment and esp0 = fresh stack.

[Adek336]

Code: Select all

00147577557i[CPU  ] real mode
00147577557i[CPU  ] CS.d_b = 16 bit
00147577557i[CPU  ] SS.d_b = 16 bit

wtf?

It seems like you switch protected mode off by chance.
Are you sure the stack before iret is all well?

Code: Select all

void debugcout(uint32 i) {
    WriteHexNum(i); }
....

addl $4, %esp
call debugcout
cli
hlt

iret

This is a trick I used to see what lied on the stack. You should have an EIP, a CS, an EFLAGS, an ESP and a SS on the stack all double words. How I'm not sure if debugcout will work on userlevel ds,es,fs,gs.

Cheers,
~Adrian