Problem with IDT, IRQ, PIC

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rumpel

Problem with IDT, IRQ, PIC

Post by rumpel »

hi,

in my opinion that all should work, but bochs seems to look different at things .. ;)
would be nice if someone can have a look at the following code. It always ends with int 13. I can't see any errors, compiles fine and runs until i press a key.

code => http://nopaste.php-q.net/71800

mfg, rumpel.
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Re:Problem with IDT, IRQ, PIC

Post by Pype.Clicker »

i don't see 'irq00' anywhere. chances are that there's a bug in your handler which raises the General Protection Failure as soon as an interrupt arise.

If i can suggest, binary bits for PIC setting are not that much readable :(

also, for non-hardwired 8259 implementations, the ICW4 should not be "1" but 9 on the slave and 0xd on the master (though that might not be relevant for this problem).

Code: Select all

mov al,0xd
        out 21h,al      ;ICW4:=IntelEnvironnement
        mov al,9
        out 0A1h,al     ;ICW4:=IntelEnvironnement
        call __wait
rumpel

Re:Problem with IDT, IRQ, PIC

Post by rumpel »

hm, i've changed it, but its the same error as before.
init_the_pic is a function from another os of me, it worked fine when used there. The new function is:

void initPIC(void)
{
   outb(PIC_MASTER_PORT0, 0x11);   // icw4 expected, cascade + edge triggering (??)
   outb(PIC_SLAVE_PORT0, 0x11);
   
   outb(PIC_MASTER_PORT1, 0x20);      // IRQ 0-7 => int 0x20 - 0x27
   outb(PIC_SLAVE_PORT1, 0x28);      // IRQ 8-15 => int 0x28 - 0x30

   outb(PIC_MASTER_PORT1, 0x04);   // conn to slave: irq2
   outb(PIC_SLAVE_PORT1, 0x02);

   outb(PIC_MASTER_PORT1, 0xd);   // icw4
   outb(PIC_SLAVE_PORT1, 9);   

   outb(PIC_MASTER_PORT1, 0xfd);
}

it brings up the same error, but thanks nevertheless.

btw: the irq_null is just something like:

cli
.kill jmp kill


mfg, rumpel.
Dreamsmith

Re:Problem with IDT, IRQ, PIC

Post by Dreamsmith »

Code: Select all

   idt.Limit   dw 255
You're telling the processor your IDT table is only 256 bytes long -- that's only enough for your first 32 vectors, vector 0 - vector 0x1F. As soon as you get an interrupt that needs vector 0x20, this will crash.

This is not directly related, but another oddity in your code:

Code: Select all

idt_struc idt[255];  // the idt
Is there some reason you're only allocating space for vectors 0 through 0xFE? You'd need to declare the array as having 256 members if you want to handle all possible interrupts, including INT 0xFF.
rumpel

Re:Problem with IDT, IRQ, PIC

Post by rumpel »

thx thx thx :)
overseen this, harr, it always takes soo long to find theese little ones ..

mfg, rumpel.
Dreamsmith

Re:Problem with IDT, IRQ, PIC

Post by Dreamsmith »

Heh, yeah, big freaking errors in your logic are easy to spot. It's that one little slightly off value or misplaced comma that leaves you beating your head against the monitor for days...
rumpel

Re:Problem with IDT, IRQ, PIC

Post by rumpel »

yes

i've written the hole thing on one day but this dammed error makes me do nothing for about one week ;)
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