LDT and Software Task Switching

[gommo]

Do you need a valid value in the LDTR register when you do a software task switch?? I am getting a fetch_raw_descriptor: LDTR.valid=0
error in bochs when I attempt to do a Ring0->Ring3 iret

I have one TSS structure that I loaded with the ss0 of my kernel data segment, and esp0 I loaded with the current value of the esp register

I have in my GDT a
NULL descriptor, a 16MB Ring0 Code seg, a 16MB Ring0 Data Seg, a TSS descriptor, a 16MB Ring3 Code seg and a 16MB Ring3 Data seg

I loaded the TR with a ltr command passing it the segment of my TSS in GDT
I wrote a test function (test_function() <= to test my ring 3 stuff)

Then I use a #define move_to_user_mode from Tabos os

I push my USER_DATA segment selector onto stack
I push the address of my user_stack onto the stack
I push the eflags on to the stack
I push the USER_CODE segment selector onto the stack
I push the &test_function onto the stack
then issue iret

thats when I get the error listed above

So do I need a valid LDT?? Or maybe I have something else wrong?

THanks

[Pype.Clicker]

bochs issue that error message when it is requested to load a segment with a selector that has TI bit set and no LDT has been given. The problem is not with the LDT but with the value (certainly garbage) you put in the selector.

make sure the selector you push have their RPL bits sets (e.g. rather push USERCODE|0x03 than raw USERCODE).

[gommo]

mm, thats what I thought but looking at the compiled code I have this

push $0x2b
push $0x104200
push $0x202
push $0x23
push $0x101f7c
iret

It definitly looks like the segment selectors I'm pushing are 0x2b and 0x23 which are
number 5 and number 4 in my GDT respectivly with
Priviledge level 3 and TI=0

[gommo]

I've looked into it a bit more and it seems that my test_function is being called but as soon as it is my DS, ES, FS and GS segments are invalid so then I think it has a general protection fault or something and jumps to my main interrupt handler.

I have written test_function in C, will I have to write it in assembly and load proper values into DS, ES, FS and GS

Do these generally get wasted on an iret call (I'm assuming so)

Thanks

[gommo]

God I love answering my own question!! (Should think b4 I post)

To get round the above problem I just loaded the ds, es, fs and gs registers with my USER_DATA segment selector.

Is this done in the linux kernel or TabOS kernel b4 jumping to user_mode. I didn't see that

[Pype.Clicker]

i haven't gone through Linux source to that level of details, but iirc, linux sends the user process at a deliberately faulty address 0xdeadbeef and handle page fault to that address as a request for user process initialization, so maybe the DS/ES/FS/GS registers are initialized there ...

[gommo]

The other thing I think is just to have the idle task run in Ring0, that way issuing a iret doesnt clear the ds,es,fs and gs registers. Straight out of the intel manual. (Again it helps to read first )