GRUB: Multiboot Information Structure ?

[Perica]

..

[mr. xsism]

@Perica:I've finally gotten GRUB to work, it's a great thing..... but i don't regret starting off OS development with writing a boot loader at all, it's taught me alot of low-level things that are necessary for kernel development. Later on i plan on writing a boot loader, but i first need something worth booting

^ post that, it is a good comment.



@Pype: why doesn't gcc pack each var automatically?! It seems to double the size for each var in the struct??? WHY!!!!!????? I see NO benefit in doing this. Is this standard for C or only GCC???????

AHHHHHH!! It makes me so mad!!!!!

[Pype.Clicker]

@Pype: why doesn't gcc pack each var automatically?! It seems to double the size for each var in the struct??? WHY!!!!!????? I see NO benefit in doing this. Is this standard for C or only GCC???????

uh ? what do you exactly mean by "pack each var automatically" ?
afaik, gcc tends to do following:
- keep the things in the binary structure in the order of declaration
- keep things aligned on their "natural" alignment constraint.

For instance, if you type

Code: Select all

struct {
   char x; // implicit align(1)
   int a;   //  implicit align(4)
   char y; // implicit align(1)
};

the resulting structure framework will be <x----|aaaa|y--->
while if you had swapped y and a, you'd have get <xy--|aaaa> and if you had swapped x and a, you'd have get <aaaa|xy>

It's likely to be standardized somewhere so that C code generated with a compiler X is binary interoperabled with a library generated with compiler Y -- and that's likely to be defined in the ELF ABI for C programs or something ...

[mr. xsism]

yeah, why doesn't it go:
xaaaay instead of x---aaaay---??? That is my question. It is a waste of space. Or am i missing an obvious answer?

[Pype.Clicker]

because that waste of space allows faster access to the int ...

[df]

4 byte aligned cache lines are quicker to access.

some arch's like SPARC, PPC, 68k dont do byte aligned boundaries / odd byte accesses.

iirc, 4/16 byte boundaries are best on x86.
4 is the default alignment.

you can alwayd compile gcc with -fpack-struct to achieve the result without having to individually pack each structure

[mr. xsism]

i don't understand how it is faster. I am sorry, this is probably an old topic for you guys, but how is it faster? How does the cache do it(faster)?

[Chris Giese]

Anyway, does anybody have anything to say about putting __attribute__((packed)) after a structure definition being legal or not??

Section 18.5 of the DJGPP FAQ sez:

C programs can declare the entire struct with the packed attribute,
but C++ programs will need to declare each member with it...

[Solar]

i don't understand how it is faster.

IA-32 Intel Architecture Software Developer's Manual, Vol. 1, ? 4.1.1 Alignment of Words, Doublewords, Quadwords, and Double Quadwords:

[...] However, to improve the performance of programs, data structures (especially stacks) should be aligned on natural boundaries whenever possible. The reason for this is that the processor requires two memory accesses to make an unaligned memory access; whereas, aligned accesses require only one memory access. [...]

If that doesn't satisfy you, I'd suggest reading the "Art of Assembly" and the Intel manuals at length to understand the stunts a CPU must pull off to access unaligned memory. That'd be a bit much to explain here.

[Pype.Clicker]

i don't understand how it is faster. I am sorry, this is probably an old topic for you guys, but how is it faster? How does the cache do it(faster)?

remember there are wires between CPU and memory slots -- usually 32 of them -- to carry datas. And all the CPU can do is request 32-bits aligned piece of data (i.e. the memory will ignore the lowest 2 bits and always send the whole dword that contains the byte you requested.

If you don't align your dwords on dwords boundary, the CPU has to make 2 requests to the memory in order to get what it needs.

That was for 386 scheme. On a pentium, you have 32 bytes "cache lines" and a burst transfer when one is requested, so the penalty of requesting 2 lines when a dword is misaligned and unfortunately cross the line is even more important ...

[Solar]

Yet worse: Picture your malalligned int to cross a page boundary. Two lookups in the page table instead of one, two potential page-ins...

Better allign your stuff.