IDT / IRQs

[z4ck]

hi you

First i've to say that i could not speak very good english because i'm from switzerland.

i'm in troubles with my idt / irq. in fact, if i boot my os (ProtectedMode, C-Kernel, IDT, PIC,...), bochs show me the error: running in bogous memory or something like that. I think something in my GDT is wrong, or in the script for linking the c kernel. or what else could it be? maybe the IRS or the IDT routines in C?

if you need the source to help me i could post it here....

please help me, i could not fix that bug...

thx4helping greez zack

[bregma]

i'm in troubles with my idt / irq. in fact, if i boot my os (ProtectedMode, C-Kernel, IDT, PIC,...), bochs show me the error: running in bogous memory or something like that. I think something in my GDT is wrong, or in the script for linking the c kernel. or what else could it be? maybe the IRS or the IDT routines in C?

if you need the source to help me i could post it here....

Might I recommend the following approach to help track down the problem.

Start by eliminating all code (comment it out) after you have set up your GDT. Bit by bit, start reenabling functions until the problem begins ocurring again. This will at least give you an indication of what part of you code may be causing the problem.

Once you know more about what part of you code is causing the problem, then post the code here with more description of the problem.

Good luck.

[[AlAdDiN]]

bochs show me the error: running in bogous memory or something like that.

seems like ur jumping to a bad adresse, this is a common error when u fail in physical to linear address translation.

if u can give the code that jump to pmode, the gdt content and the code that run just after switching to pmode, this could allow us to help u

[z4ck]

hiho,

thx for you answers. As bregma wrote, i've checked up my code. if i don't enable the interrupts or the irqs (masking) the bug error doesn't appear.

But as aladin has wrote that the code may jump in a bad adress, i think its a combinition of some code that makes the adress invalid...

i've uploaded the code here:
http://www.domae.ch/downloads/PiratOs/idt.c
http://www.domae.ch/downloads/PiratOs/isr.asm
http://www.domae.ch/downloads/PiratOs/kernel16.asm

i think its all you need.

thx lot for helping me

[[AlAdDiN]]

Code: Select all

EnablePMode:
	.0:
		cli

		
		lgdt 	[gdt_DESC]
	.1:
		mov		eax, cr0
		or		eax, 00000001b
		mov		cr0, eax
		
		jmp		0x8:.2
	.2:

this last jmp should be : jmp .2

Code: Select all

		[bits 32]
		
		mov 	ax, 0x10
		mov		ds, ax
		mov		es, ax
		mov 	fs, ax
		mov 	gs, ax
		mov		ss, ax
		mov		esp, 0x90000
		
	.3:
		jmp		END

the last jmp is wrong u shoud jmp to ur kernel32 code, assuming u loaded ur kernel at 0x1000 (linear) you have to write something like :

Code: Select all

               jmp    0x8:0x1000

if ur kernel32 is loaded just after kernel16 ur jump remain wrong, since u have to specifie a valid code adresse, and END flag is not one, u must have something like this :

Code: Select all

                jmp      0x8:_start()

where _start() is the first function in ur kernel32 code, but this is tricky coz u have some parapeters to pass to the linker.


I suggest u to put ur loader code and to explain how do u do to load kernel16 and kernel13 (ur memory organisation)

[bregma]

thx for you answers. As bregma wrote, i've checked up my code. if i don't enable the interrupts or the irqs (masking) the bug error doesn't appear.

The first thing that pops into my mind when I see this is that (1) you haven't remapped your interrupts and (b) you're jumping off into neverland when the timer interrupt comes in on IRQ 0, which it does effectively as soon as you enable interrupts.

I checked the code you posted and I can't find where your interrupt_0 handler code is.

I would suggest that before enabling interrupts you remap them into a different set of vectors other than those used by the processor traps. You do that be programming the PIC (if you're dealing with museum-grade architecture) or IOAPIC appropriately.

[z4ck]

i try to complain it, but it is quiet difficult in english....

at the end i have 2 files:

Code: Select all

filename    size           sectors     
------------------------------------------------
boot.bin     512b         #1
kernel.bin  ?               #2 -?

boot.bin
this one load the kernel into the memory and exec that


kernel.bin
this one is in fact 3 files.

Code: Select all

filename           size            task
------------------------------------------------
kernel16.asm      512b          enable pm32, a20 gate
kernel32.asm      ?               jump to the c part
kernel.c            ?               real kernel writen in c

the two files kernel32.asm (kernel32.o) and kernel.c (kernel.o) are both 32bit code, so i can easily link them together (result kernel32.bin). at the end i copy the kernel16.bin file at the begining of the kernel32.bin (result kernel.bin).

thats why i jump after enableing pmode at the end of the kernel16.bin file.


i hope so that you understand my text :S

greez zack

@bregma
i have programmed the two pics.
that what you are saying about irq0, thats what i mean to. how can i dismask the irq0 (for checking)?
outb(PIC_1_1, 0x01);??
->interrupt_0 is in the system.c file (if the function wouldn't exists, it would appear a error at linking... )

[JAAman]

sounds to me like your IDT is got the wrong addresses in it: that would cause running in bogus mem errors as the timer will fire immediatly(the queued one) and then code will switch to the IRQ0 handler which is were you would get the "bogus mem" error if your IDT is loaded wrong

[z4ck]

i've now found out, that the error comes only when irq0 is enabled. if i disable him by masking the pic, the error don't comes. now im sure that the adresses in the idt are wrong. but where is the fault??

could it be that i load the idt wrong??

Code: Select all

IDTR.limit = 256*(sizeof(interrupt)-1);
	IDTR.base  = IDT;
	
	
	idtr *IDTRptr = &IDTR;
	asm volatile ("LIDT (%0) ": :"p" (IDTRptr));

or could it be a wrong way of generate idt entrys?

Code: Select all

unsigned short int attributes=0;
	switch(DPL)
	{
		case 0:  	attributes = RING0; break;
		case 1:  	attributes = RING1; break;
		case 2:  	attributes = RING2; break;
		default:	attributes = RING3; break;
	}
	
	
	unsigned long int offset = (unsigned long int)_handler;
	unsigned short int selector = 0x08;
	asm volatile ("movw %%cs, %0 " : "=g" (selector));
	
	IDT[_number].l_offset 	= (offset & 0xFFFF);			//Lowword of offset
	IDT[_number].h_offset	= (offset >> 16);				//highword of offset
	IDT[_number].segment 	= selector;
	IDT[_number].attributes	= attributes;	

i'm realy at the end

[JAAman]

either your IDT has the wrong jump point in it or you mess up your stack on return so when it gets the iret your stack has the wrong values on it

make sure you clean up the stack before you iret

btw: you do know you cant put your C function in the IDT right? you have to create a ASM stub that calls the C function and then irets after the C function returns otherwise your stack will have other things on it and the iret will retreve the wrong address and could be causing your problem

[z4ck]

i haven't put my adresses of the c functions in the idt, look @ my irs.asm file... thats what you mean...


in fact, it couldn't fail by the c or isr routine... i have made in the irs-irq0-routine a endless loop and the error appears, too... so it must be that the idt has the wrong adress.... but why?

thx 4 helping

[JAAman]

I'm not familier with AT&T syntax so im not exactly sure what the ASM is doing but it looks like your putting the current CS into selector? this shouldn't be needed but shouldnt cause a problem - unless you changed the selectors later? or havent loaded the CS yet(its still at its rm value?)

I dont have my manuals here right now but your IDT structure looks correct but I'd double check your casts when you load them -- compilers dont always do what you might think

then make sure its actualy loaded at the correct location: if you are useing paging or segmentation it needs to be the correct virtual address

[z4ck]

i don't use pageing or else memory managment... if i write directly in the idt the selector 0x08 the same happend... how can i check that my pmode works correctly? and i think my linkscript could also be a problem by the adresses....

but in fact i've no plan what i could make now, to correct the bug...

[JAAman]

to test that you've arived in pm correctly just write to screen immediatly after the FAR JMP and loading selectors if you can then your in pm and at the location where your write is

however if you dont make it to pm you should tripple-fault at the FAR JMP irregardless of IDT

I just took a closer look at your kernel16.asm and Im not sure how your pm jmp works:
you jmp to 0x08:.2
this looks correct but since your ORG is 0 the assembler will translate .2 into the offset of .2 in the file this is not what you want you want the absolute 0 based fisical address of .2 not the offset you need to add your segment base to that value should be something like this:
jmp 0x08:.2+10000

but if your code works when you dont enable interupts then this shouldn't be the problem it must be resolved some other way that I cannot see

you havnt posted your kernel32.asm file or your boot sector so i cant see whats happening there (& that is where your IDT is loaded)

[z4ck]

kernel32.asm isn't importent... it include only a jump to the c code: jmp _main blabala...

the boot sector loads the kernel to the location 0x10000 and jump to that...

i have postet it here:
http://www.domae.ch/downloads/PiratOs/boot.asm

how can i load selectors??