implementing keyboard support

[petasaurius]

Hi!
I've managed to fix exception support, and now I want to implement keyboard support.
This is how my kernel looks like:

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void kstart() {
   INTS(false);

   remapPIC(0x20,0x28);
   maskIRQ(ALL);

   LoadExceptions();

   AddInt(0x48, int32, 0);
   loadIDTR();
   INTS(true);

   return;
}

[Ozguxxx]

Cool!!!

[petasaurius]

huh?
I want to extend that to be able to get the keyboard interrupt. The code is pretty self-explanatory

[Kemp]

I think the point with the previous code is that you need to at least tell us what you've tried (you should try it yourself you know) and ask about a particular part of it the you are having trouble with instead of just saying "I want to do this" and giving a block of code.

[Pype.Clicker]

if i understand correctly, all you'd need looks like

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   addInt(0x21,kbdHandler_stub, UNKNOWN_VALUE);

in kstart and have a proper interrupt stub (kbdHandler_stub) saving registers and calling kbdHandler() function

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void kbdHandler() {

    char scancode = inb(0x60);

    do_whatever_you_want_with(scancode);
    sendEOI();
}

For more detailed info, check OSRC (as usual )

[petasaurius]

Well, it works ?.
When I press a key on the keyboard, nothing happens.
But when I call the interrupt 0x21, the function kbdHandler calls. (int 0x21).

Code: Select all

void kstart() {
   INTS(false); //disable interrupts
   remapPIC(0x20,0x28);
        maskIRQ(ALL);
   unmaskIRQ(KEYBOARD);

   AddInt(0x21,kbdHandler_stub, 0);
   loadIDTR();

   INTS(true);

   asm("int $0x21");

   return;
}

[Pype.Clicker]

well, maybe your 'unmasking' stuff does not work properly and the keyboard interrupt are blocked at the PIC.

also, make sure you read the byte from I/O 0x60, because the keyboard controller may not send you more interrupts if that byte remains in its internal buffer.

Another error cause would be that another interrupt handler(timer?) do not send an "End Of Interrupt" signal to the PIC (using out 0x20,0x20) and thus the PIC is blocking further IRQs, waiting the CPU to acknowledge the handling of the latter one.