Some questions from a newbie kernel dever

[one]

I'm a newbie to OS programming and want to develop a kernel using C and ASM. I have already written a FAT12 bootloader which loads a secondary, the secondary jumps to p-mode etc. Now I would like to know where exactly the boot loader ends its job and where the kernel start its job.(or rather what exactly are the jobs of the kernel).
   The target architecture is intel 486/Pentium and above. I do not know its architecture in detail i.e. i can't understand the GDT,IDT etc and how to load them up as well as how they work etc. also how do i determine the processor? What about the memory layout of a PC which is just booted-up? is there any relevant information available anywhere or can i just use the memory without caring about overwriting any important info? I would reaally appreciate any help with these.Thanx in advance to all you folks.
   And by the way i noticed in <a href="http://osdev.neopages.net/tutorials/brunmar/tutorial_02.php">Gregor Brunmar's Pmode tutorial</a> that he jumps to pmode without enabling the A20 line. is it necessary that it is enabled first or can i do the same?
   And what about this invalid opcode stuff. If i execute a CPUID instruction the literature says that it would give me a "INVALID OPCODE" error on unsupported processors. How do i check this error?

[Slasher]

hi,and WELCOME to the club! ;D
You have a lot of questions so i'll answer them in at once. The 2nd stage loader's job depends on how you want the system initialization to occur. It could just load a temp GDT (IDT's not needed until you want to service interrupts),load the kernel off the disk,set the CPU to Pmode and then jump to the kernel. In this design, the kernel is written with the assumption that the system is in pmode when its starts.
Os dev has no Right or Wrong way of implementing stuff ie there is no fixed way of doing stuff,read http://www.mega-tokyo.com/forum/index.p ... eadid=3254
a lot of info there. Also visit www.osdev.org and check out the entire site,especially the links to osdev infomation.
try the following too,
http://www.beyondlogic.org/usbnutshell/usb1.htm
http://members.hyperlink.net.au/~chart/pci.htm
http://www.x86.org/
www.sandpile.org/
http://osdev.quadlinq.com/browser.js?par=11
http://www.delorie.com/djgpp/doc/coff/"
http://www.serpentine.com/~bos/os-faq/FAQ-1.html http://www.invalidsoftware.net/home/use ... 2Fnewbb%2F
http://www.mindshare.com
http://my.execpc.com/~geezer/osd/index.htm
http://www.mega-tokyo.com/forum/index.p ... 94;start=0
http://bochs.sourceforge.net
    http://kos.enix.org/links.php?lang=en
http://www.stanford.edu/~csapuntz/ide.html

Hope this helps. Also use the seach button above to seach this forum for info based on topic of interest, I'm sure all you question have be discussed at length here before. Peace.

[drizzt]

http://www.intel.com/design/pentium4/manuals/

All these volumes from the Intel site are indispensable if you want to know more about the architecture...

[one]

Are there no more responeses to this? Please help me with any info you have.

[Tim]

Read the QuickLinkz thread that Code Slasher posted a link to. That is the sum total of all the knowledge of the regulars on this board.

[Curufir]

Are there no more responeses to this? Please help me with any info you have.

Hmm, any info?

Ok.

xor edx, edx
inc edx

actually takes up less space than

mov edx, 0x1

Although the dual instruction form doesn't pair.

Not particularily useful information, but information nonetheless.

Kinda in a silly mood ;D.

[Tim]

You mean there's an unnecessary dependency on EDX when you use the XOR form?

[Curufir]

You mean there's an unnecessary dependency on EDX when you use the XOR form?

They're both simple, so they would pair if edx wasn't being used in both.

xor edx, edx implies a write on the edx register which means the following inc edx can't be executed in parallel because edx is in an unknown state until the xor instruction has finished.

[Tim]

Bah, I just let the compiler decide...

[Curufir]

Bah, I just let the compiler decide...

lol.

It actually gets to be even more fun when you take those two instructions in the context of a larger piece of code.

eg.

shl eax, 2
xor edx, edx
inc edx
add eax, 5


Should all pair up quite nicely. Keeping track of all the little rules for pairing, along with all the rules for caching and branching, whilst also writing code is very difficult to do over any decent sized program. The vast majority of programmers would make better use of their time using the compiler and only dropping to assembly language for the most commonly called loops in their code. Trying to optimise assembly is like playing Go against the processor.

***

Thought of a better analogy.

Using assembly language for a large program is like using a scalpel to butcher a cow. I'm sure you would wind up with very pretty steaks, but it's going to take a lot longer for them to reach the table. Vice versa if you use a butcher's knife to perform heart surgery the operation will take far longer and mistakes are more likely to be made.

Moral of the story: Use the right tools for the job.