Jumping to TSS

[shad]

How do you jump a tss if you dont "know" the selector value? For instance, the scheduler switching to TSS's that are varied, is there some sort of jmp VAR:0 ? or something?

[Tim]

The easiest way to do this is to push the selector and offset (in this case zero) onto the stack and use RET FAR (or lret in AT&T syntax).

[shad]

What are the sizes of the data types?

[Tim]

It doesn't matter; the stack is always 32 bits wide anyway. But recall that selectors are 16 bits and offsets are 32 bits.

[shad]

Ok, about TSS task switching... Im not sure if this is "alot" or not, but because TSS's are stored in the GDT does that mean the max tasks is 256 - GDT entries? Also, how do you initialize main() as a task? When you switch to a task that is just a procedure, not from an executable file, what do you do with the cr3? I need a good tutorial on TSS based task switching... ive seen alot based on the other way, but not on TSS based.

[Tim]

Ok, about TSS task switching... Im not sure if this is "alot" or not, but because TSS's are stored in the GDT does that mean the max tasks is 256 - GDT entries?

Yes, the GDT limits the number of TSSs you can use. The max number of GDT entries is 8192, so the maximum number of TSSs is nearly that.

Also, how do you initialize main() as a task?

You'd put the address of main into the EIP field of the target TSS. If you were switching from kernel mode to a user-mode task, you'd set up a ring 0 to ring 3 interrupt frame (see Intel manual) with the TSS selector as CS and zero as EIP.

When you switch to a task that is just a procedure, not from an executable file, what do you do with the cr3?

You don't have to do anything with CR3. The page directory (=CR3) determines which address space the task runs it. What you put in CR3 depends on what address space the task needs to access.

I need a good tutorial on TSS based task switching... ive seen alot based on the other way, but not on TSS based.

I don't know of any either. The truth is that most people use software switching. TSS switching is tricky to get right, it's harder to debug, it's less portable, and it's less capable than software switching. No 'real' OS uses it.

[shad]

If i had known software task switching was easier.. i wouldnt have even looked at Chapter 7..

[Ozguxxx]

Hi, I might have misunderstood but correct me if I am wrong: I think tss's are not needed to be in GDT, the tss descriptors should be in gdt, right?
BTW I also want to ask a question that I had in my mind. Is it a bad idea to share same tss descriptor between different threads? So that switching to a new thread is done easier. All threads are swtiched through one tss descriptor. If a new tss descriptor is allocated for each new thread we have to do this from gdt and this complicates things, I think. Also in that way you are not limited to 256 threads with only one tss descriptor for all threads. This approach might have some stupid problem I just had this in my mind for some time and I will be very glad to hear some criticism on this. Thanx. Also Shad: I am sorry if I break your concentration on your question but I think my question is related to yours. I hope it is alright for you. ;D

[distantvoices]

Hm. With Mr. Frounze's TSS-switching program at hand, I got tss based task switching fine. I'll just change this ... array of stacks and other elements I took from the tutorial as soon as I have the Process allocation part of my memory manager up and running -> It's task willbe to build a process adress space, split it up for stack/heap/code/data and pass several pointers to the tss-management - thus creating a new process which will be stuffed into one of my ready queues so that it gets dropped to the processor's fangs.

For I will also implement Stack based task switching just to see the difference, I don't care about portability.

Ozguxx, you are right, in gdt are placed descriptors which point to tss'es. This idea to share one tss descriptor amongs threads JOhn fine has figured out in one of his pmode tutorials, I think. It is a funny thing, cuz you fake the processor a not busy tss prior to task switching. It doesn't matter anyway, because prior to loading the new tss, it dumps the registers in the old one.

If I were you, I'd implement both versions because of the learning. The experience of how these two work.

[Pype.Clicker]

Hi, I might have misunderstood but correct me if I am wrong: I think tss's are not needed to be in GDT, the tss descriptors should be in gdt, right?

Well, of course, we were not talking about storing the 104 bytes of a TSS in the space where GDT is storing descriptors: that would be plain silly and would generate a lot of invalid descriptor.

What shad meant by "the TSS must be stored in the GDT" is of course that the DESCRIPTORS for TSSes must be in the GDT, not in the LDT nor in the IDT.

And, of course, you can run as much software threads as you want in a single TSS ... this just depends on your software task-switching techique ...

Clicker currently uses one TSS per (process x processor), Linux uses one TSS per processor (which is, imho the minimum you can afford

[Tim]

Right, each processor needs at least one TSS to support switching from ring 3 to ring 0 (it only uses the SS0 and ESP0 fields in this situation).

[shad]

Im having a hard time finding any software based task switching tutorials as well..

[Pype.Clicker]

check out Bona Fide tutorials from the .:QuickLinkz:.
there are also plenty of examples and comments in the forum try out "stack switching" or "software task switching".

[Perica]

..

[Tim]

It doesn't matter; the stack is always 32 bits wide anyway.

What does this mean??

When you push something onto the stack it gets extended to 32 bits if needed. ESP is always increased/decreased by 4/

It is possible to do,

Code: Select all

push byte value
or
push word value

?? I don't understand what you mean ??

Yes, but those 'word' and 'byte' are just indications to the assembler as to how big the number is. There are three separate PUSH instructions, for bytes, words and dwords, but the CPU always pushes dwords, with the appropriate number of zeroes added to the beginning.

Actually the CPU sign extends numbers, so instead of adding zeroes, it copies the top bit.