Detecting if an Interrupt was triggered by an IRQ, Exception

[Perica]

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[Chris Giese]

If you have a syscall software interrupt, use a ring 3 gate for it (access byte = 0xEE), but make every other gate ring 0 (access byte = 0x8E). User code (running at ring 3) that tries to use an illegal INT instruction will cause a general protection fault instead.

[Perica]

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[distantvoices]

If i were you, perica, I wouldn't care about THIS detection stuff. You as the developer take care of which Interrupts are triggered by what.

The IRQ-Lines of the pics trigger int - commands which refer to IDT entries you tell them to refer to.

Further more it is your task to HIDE hardware interrupts from other layers of the OS as much as possible: only the hardware drivers are to meddle with them.

Exceptions... where they come from, this is also known. I emphase KNOWN, becouse you program it.

The software interrupts: These are called by runtime library, so You als know where they come from. You sy how it works, and the computer does it. Chris Giese is right. Work with ring 3 -> ring 0 transitions through call gates/int gates. I suppose this way: have segments for code/data for the kernel, and segments for code/data for user programs - so called user space.

stay safe and don't get confused with this detection stuff.

[Pype.Clicker]

If you have a syscall software interrupt, use a ring 3 gate for it (access byte = 0xEE), but make every other gate ring 0 (access byte = 0x8E). User code (running at ring 3) that tries to use an illegal INT instruction will cause a general protection fault instead.

I don't think that would work, since Ring 3 Code can acess an Interrupt executing at Ring 0 (Am i right?);

No. You're wrong. It *will* work.
The level at which the IRQ handler will be running is defined by the RPL for the code segment in your interrupt descriptor. The Descriptor Priviledge Level of the interrupt gate (as the task gate, the fault gate, etc). Tells the processor the requested level in order to call the interrupt by software. So if the DPL field of INT 0x0E is 1, only code at level 0 or 1 will be able to issue a INT 0x0E interrupt. Any other code that try to do this will be intercepted by the CPU and trigger a General Protection Fault.

If you don't believe me, check the Intel Manual ...