Delays

[Perica]

..

[df]

got a working clock irq? or on Pentium+ use RDTSC... or some other form of hi resolution timer or whatnot.. PIT, watchdog, etc.

[Perica]

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[Pype.Clicker]

Well, the usual trick is to have a constant-period event (the CLOCK interrupt), which will be used to count the time.
If a process want to sleep for N ticks, it will set a request like "wakeup PID in TICK". Then you'll build up a linked list of requests, ordered by the amount of time that is left before the deadline occurs.

When a deadline finally occur, you just check what is to be done at the list'head and then ... you do it (in this case, wake the process up by putting it back in the scheduler's READY queue.

[Perica]

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[whyme_t]

How would i set the PIT to tick 100 times a second?

8253 TimerChip.
http://my.execpc.com/~geezer/osd/misc/index.htm#8253

how would i signal to my Kernel that the PIT has ticked?

Code: Select all

 unsigned int ticks ; //global variable
void irq0()
{
   //some code
   ticks++ ;
   //some code
}

[Pype.Clicker]

Code: Select all

 unsigned int ticks ; //global variable
void irq0()
{
   //some code
   ticks++ ;
   //some code
}

Watch out! There is a danger with that code: If you write a waiting loop saying that
"t=ticks ; while (t==ticks);" the compiler could decreet that "t==ticks" is constant (as neither T nor ticks is modified in the loop" and optimize it into

Code: Select all

mov eax,[ticks]
mov ebx,[t]
.loop:
cmp eax,ebx
jne .done
jmp .loop
.done

In order to break that, you should declare "ticks" as a VOLATILE variable.

[Perica]

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[DarylD]

There is no reason why you can't use one timer for all tasks, just chain handlers.

[Perica]

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[DarylD]

You have a function like this:

IRQ0_Handler() {

... call various timer functions you need...

scheduler()

}

Thats probably the simplest way of doing it I would say, it won't even involve chaining handlers.

If you set the PIT to 1000Hz, that should give sufficient resolution for most tasks.

[Perica]

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[rdragon]

1KHz = 1000Hz... 1000Hz per second means 1Hz takes .001 seconds to complete.

1 microsecond = .000001 seconds. 1Hz = 1000 microseconds. If you say your scheduler might take 5 microseconds to complete, that shouldn't be much of a problem at all. (If i understand everything correctly, and I may not), you have 1000 microseconds to re-enable interrupts, or find another method of queueing the interrupt to be handled, without disrupting the timer.

[Pype.Clicker]

afaik, only the first of the three PIT raises an interrupt. The other can be used in "polling" mode only :-/
Now, i think you have been wrong in your computations ... If you set up the PIT at 1KHz, and if it takes you 5 micro-seconds to perform a task switch, then you can safely run 100 times your scheduler in a timer ISR ... (1KHz --> 1 millisecond = 1000 microsecond between ticks

Now, if you still thinks it's too much, you can simply *divide* the frequency:

Code: Select all

struct timeout{
    int remains;
    int identifier;
    void (handler*)();
    struct timeout* next;
} *timeouts;

interrupt timer(void) {
   static int ticks;

   ticks++;
   timeouts->remains--;
   while (timeouts->remains==0) {
      timeouts->handler();
      timeouts=timeouts->next;
   }
}

You could define your scheduler as a task that is executed every SCHED_FREQ ticks and re-install itself in the list everytime it is executed.

Make sense ?

[Perica]

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