Pype.Clicker wrote:
Hello, ...
there's something that troubles me a bit about shared dynamically-loaded libraries ...
I'd recommend reading through
Linkers and Loaders by Levine as a place to start; see the book thread for details. the 4th edition of
Operating Systems by Stalllings also covers it briefly in the section on memory management. I'm not sure what other books talk about it; linking and loading seem to get short shrift in most OS books.
Every process might have a different memory map, so how will the kernel ensure that - say - gui.dll (or libgui.so) will be mapped at the same virtual address in every process ?
As I understand it, there are some systems that do this, yes. The libraries are mapped to specific areas in the kernel memory, and there is a master redirection table indicating where the specific functions and shared data are. This approach is considered too inflexible, however. This approach is called 'statically shared libraries' (as opposed to non-shared libraries on the one hand, and dynamically shared libraries on the other).
If not mapped at the same address, the library will have to be relocated to its new location, no ? thus, breaking the 'sharability' (as every process will need a separate copy of the library with its own relocation entries written ...)
Actually, if I understand correctly, in the case of dynamic loading and linking the redirection goes in the other direction. the library sets up it's table of handlers on loading, and hands it to the OS; when a program is loaded, the loader checks the OS library relocation tables and uses the thunks the addresses into the program. At least that seems to be how it works, for what I am reading here now at 2 am with a case of terminal bleary-eye. Perhaps it will make more sens when I re-read it later...
Now, there is the option of Position Independent Code: have a global register that keeps the address of a jump-table for the functions, so that when the library needs the address of function F (or the address for static variable X), it knows it is located at [ebx + <offset for x>] or [ebx + offset for F in the jump-table]
PIC is pretty much a necessary part of dynamic sharing, IIUC.
But locking one register to this still frustrate me ...
Why doesn't IA-32 have a [eip + offset] addressing mode
Oh, but it does! It's called the 'segmented memory model'
