Software taskswitching, why TSS?

[K.J.]

I've read if I do software task switching(PMode) that I must have at least 1 TSS.??? Is this true? If so why?

Thanks in advance,
K.J.

[Kernel Panic]

I don't know for sure, but you may want to read the recent discussion in alt.os.development: http://groups.google.com/groups?ie=utf- ... %404ax.com

[Tim]

You need a TSS only for the ring 3 to ring 0 switch. When some ring 3 code executes a ring 0 interrupt (or any more priviliged gate), the processor switches stacks to the SS0:ESP0 in the TSS (or SS1:ESP1, etc.) and pushes the old SS:ESP onto it (along with EIP and EFLAGS and, in some cases, an error code). When the ring 0 code does an IRET, the processor pops all that stuff off the ring 0 stack, thereby switching back to the ring 3 stack.

All of this is documented in the Intel 386 manual.