Memory map

[karim]

The term System Memory Map means, for example, if the address bus is 32-bit, it means all the addresses the processor can handle are, for instance, 4 GB of addresses. Then the Memory Map comes in, which divides these addresses into ranges on the motherboard. So, the Memory Map is what allocates these addresses on the motherboard, and the motherboard manufacturers are the ones who do this. Is there anything wrong with what I’m saying because these terms are confusing me?

[Octocontrabass]

The memory map is just information. It tells you which component will respond to each address.

Do you know what an address decoder is?

[JackScott]

A memory map is a conceptual table mapping each physical address on the address bus to a particular device and address on that device. The layout of the memory map is decided by the motherboard manufacturer, but they don't have freedom to put whatever they want at each address. The CPU designer and the designers of any buses used by the computer (such as PCI) also dictate where devices may be located in memory.

The motherboard will have on it a physical device that implements address decoding (the address decoder). On modern desktop PCs, this is the motherboard chipset, which does this task amongst many others. The job of the address decoder is to take a physical address sent out by the CPU on the address bus and convert it to an enable signal for a particular device, as well as an address within that device.

For example, let's take a super simple CPU, the WDC 6502 from the late 1970s. It has a 16-bit address bus, so can address up to 64KiB of memory and I/O (on the 6502 and most other CPUs you'll run into, memory and I/O share address space - the x86 is odd in this regard). The CPU design puts some limits on what types of memory can be in what locations. When the CPU resets, it looks at address 0xFFFE to see where it should begin running code from. At the very least, this means that the top two bytes of addresses must be ROM (to store this reset vector address). Realistically, this means all of ROM is stored at the top of the address space. Likewise, the CPU also has some special RAM in the lowest part of the address space (from 0x0000 to 0x01FF). Realistically, this means that at least some RAM must occupy the lower part of the address space.

What choices does this leave for the motherboard manufacturer in terms of the memory map design? Plenty. Will the computer have 4KiB or RAM, or 32KiB of RAM? Will the computer have 16KiB of ROM or 48KiB? Where does each device (serial port, printer, etc) fit into the address space?

Ben Eater's 6502 design (or at least, the design he is documenting on his excellent YouTube channel that I would definitely recommend checking out) chooses to use 16KiB of RAM at the bottom of memory, 32KiB of ROM at the top, and 16KiB of space for I/O devices in the middle. What does this look like?

Ben Eater's 6502 Memory Map

• 0x0000 - 0x3FFF is RAM
• 0x4000 - 0x7FFF is I/O
• 0x8000 - 0xFFFF is ROM

When you see a memory map published, it will quite often look something like the above.

And how does this work in hardware? The address decoder for this computer is quite simple:

• If the top bit (bit 15) of the address bus is high, the enable pin for ROM is turned on. Bits 0 to 14 are sent to the ROM's address pins.
• If bits 15 and 14 are both low (tested using an AND gate), the enable pin for RAM is turned on and bits 0 to 13 are sent to the RAM chip's address pins.
• If bit 15 is low, and bit 14 is high (using NOT and AND logic), then it's an I/O device that needs to be accessed. Another set of AND gates checks bits 12 and 13 to find out which particular device to enable.

Note that other computer designs using the same 6502 CPU can be much more complex. For fun, look up the Commodore 64's memory map - same 6502 CPU, completely different memory map with different types of memory everywhere (but still some ROM at the top and some RAM at the bottom).

The modern x86 and ARM CPUs and the chipsets/motherboards for them follow a similar concept. However, there is 40 years of development and the additional complexity that entails that makes it much more complex.

Modern computers have another piece of complexity as well: most CPUs have the concept of virtual memory, where the CPU internally divides up the address space differently from how it does on the physical address bus (usually using a technique called paging). The piece of hardware that converts from these virtual addresses to the physical addresses is called a memory management unit (MMU) and is another piece of complexity you'll want to be aware of.

Hope this helps!