I'm implementing an ATA driver and wrote a simple test to read/write to a disk using PCI Bus Mastering DMA.
However, after issuing a DMA write command, no IRQ is triggered, and I can't figure out why.
Here's the procedure I'm following:
1. Enable the Bus Master bit in the PCI configuration space's command register of the ATA controller.
2. Read BAR4 from the PCI config space and store it (for Bus Master IDE registers).
3. Set the Device Control Register (0x3F6) of the primary channel to 0 (nIEN bit = 0).
4. Allocate a physical page and temporarily map it to virtual space; write "abcdef\0" to it (data buffer).
5. Allocate another physical page, map it, and write a PRD entry with the format: 0x8000 << 48 | 512 << 32 | (buffer physical address).
6. Write the PRDT physical address to BAR4 + 0x04.
7. Write 0 to BAR4 (set transfer direction: write).
8. Write 0x6 to BAR4 + 0x02 (clear IRQ and error flags).
9. Write 0xE0 | ((lba >> 24) & 0xF) to 0x1F6 to select master drive and set top LBA bits.
10. Read the alternate status register 4 times to delay ~400ns.
11. Write the sector count to 0x1F2.
12. Write the LBA (low, mid, high bytes) to 0x1F3 ~ 0x1F5.
13. Issue the DMA write command by writing 0xCA to 0x1F7.
14. Start the DMA by writing 1 to BAR4.
After that, I spin in a loop waiting for the interrupt.
In the IRQ handler, I print a message to the terminal and set a flag to exit the loop. But the handler is never triggered—no output is printed, and the loop never ends.
Confirmed:
- The IF bit is set.
- IRQ 14 is unmasked in the PIC.
- The IDT has the handler installed.
- I'm using the primary channel and master drive only.
The kernel is running on QEMU.
Is there anything I'm missing or doing incorrectly?
Any help or insight would be greatly appreciated.
PCI Bus Mastering DMA write doesn't trigger IRQ
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Re: PCI Bus Mastering DMA write doesn't trigger IRQ
I hadn’t tested with PIO, but the issue has been resolved. I hadn’t enabled IRQ2, and that was the problem. Thank you for taking the time to read and respond!Octocontrabass wrote: ↑Wed May 21, 2025 10:01 pm Do you receive an IRQ with a DMA read command? Do you receive an IRQ with a PIO read or write command?