Mach64 memory controller initialization

[thorfdbg]

Hi folks,

is there any experience how to initialize the memory controller of the mach64 cards from ATI? I know, this is usually done by the VESA Bios, but I'm running on a non-x886 environment and cannot depend on the bios code. The Linux kernel code and the BSD code all assume that the memory controller is already setup and then only reprogram the CRTC, the DAC and the PLL for the clock, but leave the memory controller untouched.

For the r200 series and above, this is (moderately) straight forward as the Bios contains (in a documented place) the necessary register values in a table, and for even more modern cards, ATI provides the "ATOMBIOS", a pseudo-code that, when interpreted, runs through the initialization procedures.

I worked my way through the mach64 bios, and it seems it also uses some p-Code interpreter to perform these steps, however the card documentation (the register reference and programmer reference) do not contain any hints on the p-Code. It is not identical to the ATOMBIOS p-Code.

Did anyone attempt to understand this pCode? What does actually happen within the Mac mach64 cards used in the G3 series (e.g. "Gossamer") - do they have a PPC ROM, something that is interpreted by the OpenFirmware, or is the initialization entirely done by the OpenFirmware kernel and/or MacOs?

[thewrongchristian]

Hi folks,

is there any experience how to initialize the memory controller of the mach64 cards from ATI? I know, this is usually done by the VESA Bios, but I'm running on a non-x886 environment and cannot depend on the bios code. The Linux kernel code and the BSD code all assume that the memory controller is already setup and then only reprogram the CRTC, the DAC and the PLL for the clock, but leave the memory controller untouched.

No experience, but the registers seem to be included in:
http://bitsavers.informatik.uni-stuttga ... 999410.pdf

I worked my way through the mach64 bios, and it seems it also uses some p-Code interpreter to perform these steps, however the card documentation (the register reference and programmer reference) do not contain any hints on the p-Code. It is not identical to the ATOMBIOS p-Code.

Did anyone attempt to understand this pCode? What does actually happen within the Mac mach64 cards used in the G3 series (e.g. "Gossamer") - do they have a PPC ROM, something that is interpreted by the OpenFirmware, or is the initialization entirely done by the OpenFirmware kernel and/or MacOs?

I wonder if it's fcode instead of p-Code. If it was fcode, it can be used as is on OpenFirmware, and Mach64 based GFX were also used in entry level Sun Ultra 5/10, so it would make sense that it's OpenFirmware executable code.