APIC and uncacheable mapping

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mrjbom
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APIC and uncacheable mapping

Post by mrjbom »

An article on the osdev wiki states in the code comments, “Section 11.4.1 of the Intel SDM Volume 3 recommends that the base address page be displayed as strongly uncacheable for correct APIC operation”.
However, I couldn't find section 11.4.1 and I didn't find it in the neighboring sections either.
I would like to know if I should disable caching only for base address mapping or for all other ACPI related addresses?
Last edited by mrjbom on Mon Dec 09, 2024 2:40 pm, edited 1 time in total.
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iansjack
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Re: ACPI and uncacheable mapping

Post by iansjack »

The Intel manuals have varied over the years, so chapters and sections may vary. In the edition that I am looking at it’s section 10.4.1. It’s always possible that there’s a typo in that comment.
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mrjbom
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Re: ACPI and uncacheable mapping

Post by mrjbom »

iansjack wrote: ↑Mon Dec 09, 2024 2:07 pm The Intel manuals have varied over the years, so chapters and sections may vary. In the edition that I am looking at it’s section 10.4.1. It’s always possible that there’s a typo in that comment.
That's right, in my May 2020 version it's section 10.4.1. Thanks!
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Octocontrabass
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Re: ACPI and uncacheable mapping

Post by Octocontrabass »

mrjbom wrote: ↑Mon Dec 09, 2024 1:18 pmAPIC
ACPI
APIC and ACPI are two different things. Which one are you asking about?
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mrjbom
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Re: ACPI and uncacheable mapping

Post by mrjbom »

Octocontrabass wrote: ↑Mon Dec 09, 2024 2:26 pm
mrjbom wrote: ↑Mon Dec 09, 2024 1:18 pmAPIC
ACPI
APIC and ACPI are two different things. Which one are you asking about?
Oops. I'm talking about APIC.
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mrjbom
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Re: ACPI and uncacheable mapping

Post by mrjbom »

But I'm not quite sure how I'm must do that. I guess I have to set the PCD bit and clear PWT bit in PT for this page and that's it?
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Octocontrabass
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Re: ACPI and uncacheable mapping

Post by Octocontrabass »

mrjbom wrote: ↑Mon Dec 09, 2024 2:30 pmI guess I have to set the PCD bit and clear PWT bit in PT for this page and that's it?
If you want to set the page's memory type to UC, you need to set both PCD and PWT (assuming the PAT is unsupported or set to the default).

But usually you don't need to do that. The firmware should have initialized the MTRRs to make all MMIO uncacheable.
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mrjbom
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Re: ACPI and uncacheable mapping

Post by mrjbom »

Octocontrabass wrote: ↑Mon Dec 09, 2024 3:05 pm
mrjbom wrote: ↑Mon Dec 09, 2024 2:30 pmI guess I have to set the PCD bit and clear PWT bit in PT for this page and that's it?
If you want to set the page's memory type to UC, you need to set both PCD and PWT (assuming the PAT is unsupported or set to the default).

But usually you don't need to do that. The firmware should have initialized the MTRRs to make all MMIO uncacheable.
I'll do it anyway, just in case. Thanks for the reply!
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